Multi-Level Optimization for Large Scale ASICS. - Akira Nagoya; Yukihiro Nakamura; Kiyoshi Oguri; Ryo Nomura (ICCAD, 1990)

Vector processor design for parallel DSP systems using hierarchical behavioral description based synthesizer. - Hiroshi Nakada; Naoya Sakurai; Yukiharu Kanayama; Naohisa Ohta; Kiyoshi Oguri (ICCD, 1990)

Test Synthesis from Behavioral Description Based on Data Transfer Analysis. - Mitsuteru Yukishita; Kiyoshi Oguri; Tsukasa Kawaoka (IEICE Trans. Inf. Syst., 1995)

Plastic Cell Architecture: Towards Reconfigurable Computing for General-Purpose. - Kouichi Nagami; Kiyoshi Oguri; Tsunemichi Shiozawa; Hideyuki Ito; Ryusuke Konishi (FCCM, 1998)

A Hardware Implementation of Constraint Satisfaction Problem Based on New Reconfigurable LSI Architecture. - Tsunemichi Shiozawa; Kiyoshi Oguri; Kouichi Nagami; Hideyuki Ito; Ryusuke Konishi; Norbert Imlig (FPL, 1998)

General-Purpose Computer Architecture Based on Fully Programmable Logic. - Kiyoshi Oguri; Norbert Imlig; Hideyuki Ito; Kouichi Nagami; Ryusuke Konishi; Tsunemichi Shiozawa (ICES, 1998)

The Plastic Cell Architecture for Dynamic Reconfigurable Computing. - Hideyuki Ito; Kiyoshi Oguri; Kouichi Nagami; Ryusuke Konishi; Tsunemichi Shiozawa (International Workshop on Rapid System Prototyping, 1998)

Message routing latency-minimizing method in an ASIC design for distributed cooperative communication protocol processing. - Hiroyuki Yamashita; Toshihiko Suguri; Shingo Kinoshita; Yasushi Okada; Kiyoshi Oguri (Syst. Comput. Jpn., 1998)

Plastic Cell Architecture: A Dynamically Reconfigurable Hardware-Based Computer. - Hiroshi Nakada; Kiyoshi Oguri; Norbert Imlig; Minoru Inamori; Ryusuke Konishi; Hideyuki Ito; Kouichi Nagami; Tsunemichi Shiozawa (IPPS/SPDP Workshops, 1999)

Communicating logic: an alternative embedded stream processing paradigm. - Norbert Imlig; Ryusuke Konishi; Tsunemichi Shiozawa; Kiyoshi Oguri; Kouichi Nagami; Hideyuki Ito; Minoru Inamori; Hiroshi Nakada (ASP-DAC, 2000)

An Implementation of Longest Prefix Matching for IP Router on Plastic Cell Architecture. - Tsunemichi Shiozawa; Norbert Imlig; Kouichi Nagami; Kiyoshi Oguri; Akira Nagoya; Hiroshi Nakada (FPL, 2000)

PCA-1: A Fully Asynchronous, Self-Reconfigurable LSI. - Ryusuke Konishi; Hideyuki Ito; Hiroshi Nakada; Akira Nagoya; Norbert Imlig; Tsunemichi Shiozawa; Minoru Inamori; Kouichi Nagami; Kiyoshi Oguri (ASYNC, 2001)

Self-reorganising systems on VLSI circuits. - Hiroshi Nakada; Hideyuki Ito; Ryusuke Konishi; Akira Nagoya; Kiyoshi Oguri; Tsunemichi Shiozawa; Norbert Imlig (ISCAS (4), 2001)

A Method of Mapping Finite State Machine into PCA Plastic Parts. - Minoru Inamori; Hiroshi Nakada; Ryusuke Konishi; Akira Nagoya; Kiyoshi Oguri (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2002)

Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA. - Kiyoshi Oguri; Yuichiro Shibata; Akira Nagoya (Asia-Pacific Computer Systems Architecture Conference, 2003)

Implementation of the Extended Euclidean Algorithm for the Tate Pairing on FPGA. - Takehiro Ito; Yuichiro Shibata; Kiyoshi Oguri (FPL, 2004)

Evaluation of Space Allocation Circuits. - Shinya Kyusaka; Hayato Higuchi; Taichi Nagamoto; Yuichiro Shibata; Kiyoshi Oguri (EUC, 2005)

New Area Management Method Based on "Pressure" for Plastic Cell Architecture. - Taichi Nagamoto; Satoshi Yano; Mitsuru Uchida; Yuichiro Shibata; Kiyoshi Oguri (EUC, 2005)

Efficient Scheduling of Rate Law Functions for ODE-Based Multimodel Biochemical Simulation on an FPGA. - Naoki Iwanaga; Yuichiro Shibata; Masato Yoshimi; Yasunori Osana; Yow Iwaoka; Tomonori Fukushima; Hideharu Amano; Akira Funahashi; Noriko Hiroi; Hiroaki Kitano; Kiyoshi Oguri (FPL, 2005)

An Implementation Technique of Multi-Cycled Arithmetic Functions For a Dynamically Reconfigurable Processor. - Miwa Miyata; Hideyuki Tsuchiya; Yuichiro Shibata; Kiyoshi Oguri (FPL, 2006)

Implementation of a barotropic operator for ocean model simulation using a reconfigurable machine. - Sayaka Shida; Yuichiro Shibata; Kiyoshi Oguri; Duncan A. Buell (FPL, 2007)

A Combining technique of rate law functions for a cost-effective reconfigurable biological simulator. - Hideki Yamada; Naoki Iwanaga; Yuichiro Shibata; Yasunori Osana; Masato Yoshimi; Yow Iwaoka; Yuri Nishikawa; Toshinori Kojima; Hideharu Amano; Akira Funahashi; Noriko Hiroi; Hiroaki Kitano; et al. (FPL, 2007)

FPGA Implementation of a Statically Reconfigurable Java Environment for Embedded Systems. - Shinsuke Nino; Takayuki Mori; YoungHun Ko; Yuichiro Shibata; Kiyoshi Oguri (FPT, 2007)

An optimization method focusing on fixed-point arithmetic in applications for dynamically reconfigurable processor. - Miwa Miyata; Yuichiro Shibata; Kiyoshi Oguri (Syst. Comput. Jpn., 2007)

Retrieving 3-d information with FPGA-based stream processing. - Hidenori Matsubayashi; Shinsuke Nino; Toru Aramaki; Yuichiro Shibata; Kiyoshi Oguri (FPGA, 2008)

An optimization method of DMA transfer for a general purpose reconfigurable machine. - Sayaka Shida; Yuichiro Shibata; Kiyoshi Oguri; Duncan A. Buell (FPL, 2008)

Bayesian Multi-topic Microarray Analysis with Hyperparameter Reestimation. - Tomonari Masada; Tsuyoshi Hamada; Yuichiro Shibata; Kiyoshi Oguri (ADMA, 2009)

Accelerating Phase Correlation Functions Using GPU and FPGA. - Kentaro Matsuo; Tsuyoshi Hamada; Masayuki Miyoshi; Yuichiro Shibata; Kiyoshi Oguri (AHS, 2009)

Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator. - Tomoya Ishimori; Hideki Yamada; Yuichiro Shibata; Yasunori Osana; Masato Yoshimi; Yuri Nishikawa; Hideharu Amano; Akira Funahashi; Noriko Hiroi; Kiyoshi Oguri (ARC, 2009)

Dynamic hyperparameter optimization for bayesian topical trend analysis. - Tomonari Masada; Daiji Fukagawa; Atsuhiro Takasu; Tsuyoshi Hamada; Yuichiro Shibata; Kiyoshi Oguri (CIKM, 2009)

Configuring area and performance: Empirical evaluation on an FPGA-based biochemical simulator. - Tomonori Ooya; Hideki Yamada; Tomoya Ishimori; Yuichiro Shibata; Yasunori Osana; Kiyoshi Oguri; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano (FPL, 2009)

Accelerating Collapsed Variational Bayesian Inference for Latent Dirichlet Allocation with Nvidia CUDA Compatible Devices. - Tomonari Masada; Tsuyoshi Hamada; Yuichiro Shibata; Kiyoshi Oguri (IEA/AIE, 2009)

A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA. - Hideki Yamada; Yasunori Osana; Tomoya Ishimori; Tomonori Ooya; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano; Yuichiro Shibata; Kiyoshi Oguri (ReConFig, 2009)

Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining. - Tomonari Masada; Atsuhiro Takasu; Tsuyoshi Hamada; Yuichiro Shibata; Kiyoshi Oguri (APWeb/WAIM, 2009)

A novel multiple-walk parallel algorithm for the Barnes-Hut treecode on GPUs - towards cost effective, high performance N-body simulation. - Tsuyoshi Hamada; Keigo Nitadori; Khaled Benkrid; Yousuke Ohno; Gentaro Morimoto; Tomonari Masada; Yuichiro Shibata; Kiyoshi Oguri; Makoto Taiji (Comput. Sci. Res. Dev., 2009)

Infinite latent process decomposition. - Tomonari Masada; Yuichiro Shibata; Kiyoshi Oguri (BIBM Workshops, 2010)

A datapath classification method for FPGA-based scientific application accelerator systems. - Yui Ogawa; Tomonori Ooya; Yasunori Osana; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano; Yuichiro Shibata; Kiyoshi Oguri (FPT, 2010)

Modeling Topical Trends over Continuous Time with Priors. - Tomonari Masada; Daiji Fukagawa; Atsuhiro Takasu; Yuichiro Shibata; Kiyoshi Oguri (ISNN (2), 2010)

Unsupervised Segmentation of Bibliographic Elements with Latent Permutations. - Tomonari Masada; Yuichiro Shibata; Kiyoshi Oguri (WISE Workshops, 2010)

Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator. - Hideki Yamada; Yui Ogawa; Tomonori Ooya; Tomoya Ishimori; Yasunori Osana; Masato Yoshimi; Yuri Nishikawa; Akira Funahashi; Noriko Hiroi; Hideharu Amano; Yuichiro Shibata; Kiyoshi Oguri (IPSJ Trans. Syst. LSI Des. Methodol., 2010)

Implementation of a programming environment with a multithread model for reconfigurable systems. - Keisuke Dohi; Yuichiro Shibata; Tsuyoshi Hamada; Tomonari Masada; Kiyoshi Oguri; Duncan A. Buell (SIGARCH Comput. Archit. News, 2010)

Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation. - Keisuke Dohi; Yuji Yorita; Yuichiro Shibata; Kiyoshi Oguri (FPL, 2011)

Deep pipelined one-chip FPGA implementation of a real-time image-based human detection algorithm. - Kazuhiro Negi; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri (FPT, 2011)

Semi-supervised Bibliographic Element Segmentation with Latent Permutations. - Tomonari Masada; Atsuhiro Takasu; Yuichiro Shibata; Kiyoshi Oguri (ICADL, 2011)

Documents as a Bag of Maximal Substrings - An Unsupervised Feature Extraction for Document Clustering. - Tomonari Masada; Yuichiro Shibata; Kiyoshi Oguri (ICEIS (1), 2011)

Clustering Documents with Maximal Substrings. - Tomonari Masada; Atsuhiro Takasu; Yuichiro Shibata; Kiyoshi Oguri (ICEIS, 2011)

Steering Time-Dependent Estimation of Posteriors with Hyperparameter Indexing in Bayesian Topic Models. - Tomonari Masada; Atsuhiro Takasu; Yuichiro Shibata; Kiyoshi Oguri (PAKDD (1), 2011)

GPU implementation and optimization of electromagnetic simulation using the FDTD method for antenna designing. - Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri; Takafumi Fujimoto (SIGARCH Comput. Archit. News, 2011)

A discussion on calculating eigenvalues of real symmetric tridiagonal matrices on a GPU. - Kohei Matsunobu; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri (SIGARCH Comput. Archit. News, 2011)

Deep-pipelined FPGA implementation of ellipse estimation for eye tracking. - Keisuke Dohi; Yuma Hatanaka; Kazuhiro Negi; Yuichiro Shibata; Kiyoshi Oguri (FPL, 2012)

Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation. - Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri; Takafumi Fujimoto (IEICE Trans. Inf. Syst., 2012)

Performance comparison of GPU programming frameworks with the striped Smith-Waterman algorithm. - Takeshi Kakimoto; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri (SIGARCH Comput. Archit. News, 2012)

A Fast Runtime Visualization of a GPU-Based 3D-FDTD Electromagnetic Simulation. - Kota Aoki; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri; Takafumi Fujimoto (CANDAR, 2013)

Performance modeling and optimization of 3-D stencil computation on a stream-based FPGA accelerator. - Keisuke Dohi; Kota Fukumoto; Yuichiro Shibata; Kiyoshi Oguri (ReConFig, 2013)

FPGA Implementation of Human Detection by HOG Features with AdaBoost. - Keisuke Dohi; Kazuhiro Negi; Yuichiro Shibata; Kiyoshi Oguri (IEICE Trans. Inf. Syst., 2013)

FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis. - Kaoru Hamasaki; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri (ARC, 2014)

A soft-core processor for finite field arithmetic with a variable word size accelerator. - Aiko Iwasaki; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri; Ryuichi Harasawa (FPL, 2014)

A Memory Profiling Framework for Stencil Computation on an FPGA Accelerator with High Level Synthesis. - Rie Soejima; Koji Okina; Keisuke Dohi; Yuichiro Shibata; Kiyoshi Oguri (SIGARCH Comput. Archit. News, 2014)

An energy-efficient FPGA-based soft-core processor with a configurable word size ECC arithmetic accelerator. - Aiko Iwasaki; Yuichiro Shibata; Kiyoshi Oguri; Ryuichi Harasawa (COOL Chips, 2015)

Study of mirror box therapy support system by leap motion. - Makoto Fujimura; Shuhei Sato; Toshio Higashi; Kiyoshi Oguri (ICCE-TW, 2015)

Performance Modeling of Stencil Computing on a Stream-Based FPGA Accelerator for Efficient Design Space Exploration. - Keisuke Dohi; Koji Okina; Rie Soejima; Yuichiro Shibata; Kiyoshi Oguri (IEICE Trans. Inf. Syst., 2015)

Power Performance Profiling of 3-D Stencil Computation on an FPGA Accelerator for Efficient Pipeline Optimization. - Koji Okina; Rie Soejima; Kota Fukumoto; Yuichiro Shibata; Kiyoshi Oguri (SIGARCH Comput. Archit. News, 2015)

A Comparison of Machine Learning Classifiers for FPGA Implementation of HOG-Based Human Detection. - Masahito Oishi; Yoshiki Hayashida; Ryo Fujita; Yuichiro Shibata; Kiyoshi Oguri (ARC, 2016)

FPGA implementation of a real-time super-resolution system using a convolutional neural network. - Taito Manabe; Yuichiro Shibata; Kiyoshi Oguri (FPT, 2016)

FPGA-based Real-Time Object Tracking Using a Particle Filter with Stream Architecture. - Akane Tahara; Yoshiki Hayashida; Theint Theint Thu; Yuichiro Shibata; Kiyoshi Oguri (CANDAR, 2016)

HLS-Based FPGA Acceleration of Building-Cube Stencil Computation. - Rie Soejima; Yuichiro Shibata; Kiyoshi Oguri (CISIS, 2017)

Power Performance Analysis of FPGA-Based Particle Filtering for Realtime Object Tracking. - Akane Tahara; Yoshiki Hayashida; Theint Theint Thu; Yuichiro Shibata; Kiyoshi Oguri (CISIS, 2017)

FPGA implementation of a real-time super-resolution system with a CNN based on a residue number system. - Taito Manabe; Yuichiro Shibata; Kiyoshi Oguri (FPT, 2017)

FPGA Implementation of A Graph Cut Algorithm For Stereo Vision. - Ryo Kamasaka; Yuichiro Shibata; Kiyoshi Oguri (HEART, 2017)

Comparative Evaluation of FPGA Implementation Alternatives for Real-Time Robust Ellipse Estimation based on RANSAC Algorithm. - Theint Theint Thu; Jimpei Hamamura; Rie Soejima; Yuichiro Shibata; Kiyoshi Oguri (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2017)

Deep-pipelined FPGA Implementation of Real-time Object Tracking using a Particle Filter. - Theint Theint Thu; Yoshiki Hayashida; Akane Tahara; Yuichiro Shibata; Kiyoshi Oguri (Int. J. Netw. Comput., 2017)

Discussion on High Level Synthesis FPGA Design of Camera Calibration. - Kazuya Uetsuhara; Hiroki Nagayama; Yuichiro Shibata; Kiyoshi Oguri (CISIS, 2018)

An FPGA-oriented Graph Cut Algorithm for Accelerating Stereo Vision. - Ryo Kamasaka; Yuichiro Shibata; Kiyoshi Oguri (ReConFig, 2018)

A new stereo formulation not using pixel and disparity models. - Kiyoshi Oguri; Yuichiro Shibata (CoRR, 2018)

FPGA Implementation of a Real-Time Super-Resolution System Using Flips and an RNS-Based CNN. - Taito Manabe; Yuichiro Shibata; Kiyoshi Oguri (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2018)

Pipelined FPGA Implementation of a Wave-Front-Fetch Graph Cut System. - Naofumi Yoshinaga; Ryo Kamasaka; Yuichiro Shibata; Kiyoshi Oguri (CISIS, 2019)