New algorithms for increased efficiency in hierarchical design rule checking. - Nils Hedenstierna; Kjell O. Jeppson (Integr., 1987)

CMOS Circuit Speed and Buffer Optimization. - Nils Hedenstierna; Kjell O. Jeppson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

The use of inverse layout trees for hierarchical design verification. - Nils Hedenstierna; Kjell O. Jeppson (ICCAD, 1988)

A corner-based hierarchical circuit extractor. - Nils Hedenstierna; Kjell O. Jeppson (Integr., 1988)

The Use of Inverse Layout Trees for Hierarchical Design Rule Checking. - Nils Hedenstierna; Kjell O. Jeppson (DAC, 1989)

Comments on 'A module generator for optimized CMOS buffers'. - Nils Hedenstierna; Kjell O. Jeppson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

The halo algorithm-an algorithm for hierarchical design of rule checking of VLSI circuits. - Nils Hedenstierna; Kjell O. Jeppson (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Formal definitions of edge-based geometric design rules. - Kjell O. Jeppson; Sven Christensson; Nils Hedenstierna (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Comments on the optimum CMOS tapered buffer problem. - Nils Hedenstiema; Kjell O. Jeppson (IEEE J. Solid State Circuits, 1994)

Modeling the influence of the transistor gain ratio and the input-to-output coupling capacitance on the CMOS inverter delay. - Kjell O. Jeppson (IEEE J. Solid State Circuits, 1994)

Comments on the metastable behavior of mismatched CMOS latches. - Kjell O. Jeppson (IEEE J. Solid State Circuits, 1996)

A surface potential model for predicting substrate noise coupling in integrated circuits. - Simon Kristiansson; Fredrik Ingvarson; Shiva Prasad Kagganti; Kjell O. Jeppson (CICC, 2004)

A surface potential model for predicting substrate noise coupling in integrated circuits. - Simon Kristiansson; Fredrik Ingvarson; Shiva Prasad Kagganti; Nebojsa Simic; Marinel Zgrda; Kjell O. Jeppson (IEEE J. Solid State Circuits, 2005)

Properties and modeling of ground structures for reducing substrate noise coupling in ICs. - Simon Kristiansson; Fredrik Ingvarson; Kjell O. Jeppson (ISCAS, 2006)

Evaluation of using active circuitry for substrate noise suppression. - Rashid Farivar; Simon Kristiansson; Fredrik Ingvarson; Kjell O. Jeppson (ACM Great Lakes Symposium on VLSI, 2007)

A Student-Oriented Course in Digital VLSI Design. - Kjell O. Jeppson (MSE, 2007)

Noise Interaction Between Power Distribution Grids and Substrate. - Daniel A. Andersson; Simon Kristiansson; Lars J. Svensson; Per Larsson-Edefors; Kjell O. Jeppson (ISQED, 2008)

Exploring prefix-tree adders using excel spreadsheets Setting up an explorative learning environment. - Kjell O. Jeppson; Per Larsson-Edefors (MSE, 2013)

A learning tool MOSFET model: A stepping-stone from the square-law model to BSIM4. - Kjell O. Jeppson (PATMOS, 2013)

Timing- and power-driven ALU design training using spreadsheet-based arithmetic exploration. - Per Larsson-Edefors; Kjell O. Jeppson (EWME, 2014)