CoLeCTs: Cooperative Learning Classifier Tables for Resource Management in MPSoCs. - Klajd Zyla; Florian Maurer 003; Thomas Wild; Andreas Herkersdorf (ARCS, 2023)

FlexPipe: Fast, Flexible and Scalable Packet Processing for High-Performance SmartNICs. - Klajd Zyla; Marco Liess; Thomas Wild; Andreas Herkersdorf (VLSI-SoC, 2023)

FlexCross: High-Speed and Flexible Packet Processing via a Crosspoint-Queued Crossbar. - Klajd Zyla; Marco Liess; Thomas Wild; Andreas Herkersdorf (DSD, 2024)

FlexRoute: A Fast, Flexible and Priority-Aware Packet-Processing Design. - Klajd Zyla; Marco Liess; Thomas Wild; Andreas Herkersdorf (PDP, 2024)

HiPerNoC: A High-Performance Network-an-Chip for Flexible and Scalable FPGA-Based SmartNICs. - Klajd Zyla; Marco Liess; Thomas Wild; Andreas Herkersdorf (DATE, 2025)