State assignment for FSM low power design. - Manfred Koegst; Klaus Feske; Günter Franke (EURO-DAC, 1996)

Low Power Design of FSMs by State Assignment and Disabling Self-Loops. - Manfred Koegst; Günter Franke; Steffen Rülke; Klaus Feske (EUROMICRO, 1997)

Technology-driven FSM partitioning for synthesis of large sequential circuits targeting lookup-table based FPGAs. - Klaus Feske; Sven Mulka; Manfred Koegst; Günter Elst (FPL, 1997)

Multi-Criterial State Assignment for Low Power FSM Design. - Manfred Koegst; Günter Franke; Steffen Rülke; Klaus Feske (EUROMICRO, 1998)

FPGA based prototyping using a target driven FSM partitioning strategy. - Klaus Feske; Steffen Rülke; Manfred Koegst (ICECS, 1998)

Verringerung der Leistungsaufnahme in sequentiellen Schaltungen durch Vorlogik und zweistufige Zustandskodierung. - Manfred Koegst; Günter Franke; Klaus Feske; Steffen Rülke (MBMV, 1998)

Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler. - Klaus Feske; Michael Scholz; Günther Döring; Denis Nareike (FPL, 1999)

TCP/IP Protocol Engine System Simulation. - Mirko Benz; Klaus Feske; Uwe Hatnik; Peter Schwarz (PROMS, 2001)

Enhanced Reusability for SoC-Based HW/SW Co-Design. - Maik Boden; Jörg Schneider; Klaus Feske; Steffen Rülke (DSD, 2002)

SoC Based Low Cost Design of Digital Audio Broadcasting Transport Network Applications. - Klaus Feske; Georg Heinrich; Berndt Fritzsche; Mark Langer (FPL, 2002)

Entwurfsunterstützung zur hardwarebasierten TCP/IP-Beschleunigung (Design Support for Hardware Based TCP/IP Accelerator). - Mirko Benz; Uwe Hatnik; Klaus Feske; Jürgen Haufe (Informationstechnik Tech. Inform., 2002)