Hierarchical partitioning. - Dirk Behrens; Klaus Harbich; Erich Barke (ICCAD, 1996)

An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping. - Jörn Stohmann; Klaus Harbich; Markus Olbrich; Erich Barke (FPL, 1998)

A Case Study: Logic Emulation - Pitfalls and Solutions. - Klaus Harbich; Jörn Stohmann; Erich Barke; Ludwig Schwoerer (IEEE International Workshop on Rapid System Prototyping, 1999)

PuMA++: From Behavioral Specification to Multi-FPGA-Prototype. - Klaus Harbich; Erich Barke (FPL, 2001)

A timing driven RTL based design flow for multi-FPGA rapid prototyping systems. - Klaus Harbich (VDI-Verlag, 2003)

Test and reliability challenges in automotive microelectronics. - Christian Sebeke; C. Jung; Klaus Harbich; S. Fuchs; J. Schwarz; Peter Göhner (DATE, 2006)

Parsifal: A Generic and Configurable Fault Emulation Environment with Non-Classical Fault Models. - Jan Torben Weinkopf; Klaus Harbich; Erich Barke (FPL, 2006)

Incremental Fault Emulation. - Jan Torben Weinkopf; Klaus Harbich; Erich Barke (FPL, 2007)