Ein System-Diagnoseprozessor für zentralen und dezentralen Einsatz in Prozeßrechner-Systemen. - Klaus Schneider 001 (Fachtagung Prozessrechner, 1981)

Automating Most Parts of Hardware Proofs in HOL. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (CAV, 1991)

Integrating a First-Order Automatic Prover in the HOL Environment. - Ramayya Kumar; Thomas Kropf; Klaus Schneider 001 (TPHOLs, 1991)

First Steps Towards Automating Hardware Proofs in HOL. - Ramayya Kumar; Thomas Kropf; Klaus Schneider 001 (TPHOLs, 1991)

Structure in Hardware Proofs: First Steps Towards Automation in a Higher-Order Environment. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (VLSI, 1991)

The FAUST - Prover. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (CADE, 1992)

Efficient Representation and Computation of Tableau Proofs. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (TPHOLs, 1992)

Modelling Generic Hardware Structures by Abstract Datatypes. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (TPHOLs, 1992)

Embedding Hardware Verification Within a Commercial Design Framework. - Thomas Kropf; Ramayya Kumar; Klaus Schneider 001 (CHARME, 1993)

Hardware-Verification using First Order BDDs. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (CHDL, 1993)

A Functional Approach for Formalizing Regular Hardware Structures. - Dirk Eisenbiegler; Klaus Schneider 001; Ramayya Kumar (HUG, 1993)

Alternative Proof Procedures for Finite-State Machines in Higher-Order Logic. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (HUG, 1993)

Eliminating Higher-Order Quantifiers to Obtain Decision Procedures for Hardware Verification. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (HUG, 1993)

Structuring and Automating Hardware Proofs in a Higher-Order Theorem-Proving Environment. - Ramayya Kumar; Klaus Schneider 001; Thomas Kropf (Formal Methods Syst. Des., 1993)

Control Path Oriented Verification of Sequential Generic Circuits with Control and Data Path. - Klaus Schneider 001; Thomas Kropf; Ramayya Kumar (EDAC-ETC-EUROASIC, 1994)

A Formal Framework for High Level Synthesis. - Thomas Kropf; Klaus Schneider 001; Ramayya Kumar (TPCD, 1994)

Automating Verification by Functional Abstraction at the System Level. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (TPHOLs, 1994)

Accelerating Tableaux Proofs Using Compact Representations. - Klaus Schneider 001; Ramayya Kumar; Thomas Kropf (Formal Methods Syst. Des., 1994)

Formal synthesis of circuits with a simple handshake protocol. - Ramayya Kumar; Thomas Kropf; Klaus Schneider 001 (VLSI Design, 1995)

Ein einheitlicher Ansatz zur Unterstützung von Abstraktionsmechanismen der Hardware-Verifikation. - Klaus Schneider 001 (Infix, 1996)

A Unified Approach for Combining Different Formalisms for Hardware Verification. - Klaus Schneider 001; Thomas Kropf (FMCAD, 1996)

The C@S System. - Klaus Schneider 001; Thomas Kropf (Formal Hardware Verification, 1997)

Formal Specification in VHDL for Hardware Verification. - Ralf Reetz; Klaus Schneider 001; Thomas Kropf (DATE, 1998)

Model Checking on Product Structures. - Klaus Schneider 001 (FMCAD, 1998)

Comparing Model Checking and Term Rewriting for the Verification of an Embedded System. - Klaus Schneider 001; Michaela Huhn (DIPES, 1998)

Modeling and Verifying Abstract Multithreaded Systems. - Winfried Grünewald; Klaus Schneider 001 (MBMV, 1998)

A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems. - Thomas Kropf; Jürgen Ruf; Klaus Schneider 001; Markus Wild (MBMV, 1998)

Kontrollfluss-Verifikation von Algorithmen mittels Modellprüfung. - Ingo Schreiber; Jens Schönherr; Eva Fordran; Klaus Schneider 001; Bernd Straube (MBMV, 1998)

Yet another Look at the LTL Model Checking. - Klaus Schneider 001 (CHARME, 1999)

Validation of Object-Oriented Concurrent Designs by Model Checking. - Klaus Schneider 001; Michaela Huhn; George Logothetis (CHARME, 1999)

Verifying Imprecisely Working Arithmetic Circuits. - Michaela Huhn; Klaus Schneider 001; Thomas Kropf; George Logothetis (DATE, 1999)

Introducing Mutual Exclusion in Esterel. - Klaus Schneider 001; Viktor K. Sabelfeld (Ershov Memorial Conference, 1999)

Translating a Visual Description Technique to a Synchronous Language: From DiChartsto PURR. - Thomas Stauner; Klaus Schneider 001; Michaela Huhn (FBT, 1999)

Abstraction of Systems with Counters for Symbolic Model Checking. - Klaus Schneider 001; George Logothetis (MBMV, 1999)

A HOL Conversion for Translating Linear Time Temporal Logic to omega-Automata. - Klaus Schneider 001; Dirk W. Hoffmann (TPHOLs, 1999)

Formale Verifikation eingebetteter Systeme. - Detlef Schmid; Klaus Schneider 001; Michaela Huhn; George Logothetis; Viktor K. Sabelfeld (Informationstechnik Tech. Inform., 1999)

Abstraction from Counters: An Application on Real-Time Systems. - George Logothetis; Klaus Schneider 001 (DATE, 2000)

A Verified Hardware Synthesis of Esterel Programs. - Klaus Schneider 001 (DIPES, 2000)

Can American Checkers be Solved by Means of Symbolic Model Checking? - Michael Baldamus; Klaus Schneider 001; Michael Wenz; Roberto Ziller (FM-Everywhere@FORTE/PSTV, 2000)

The BDD Space Complexity of Different Forms of Concurrency. - Michael Baldamus; Klaus Schneider 001 (ACSD, 2001)

Embedding Imperative Synchronous Languages in Interactive Theorem Provers. - Klaus Schneider 001 (ACSD, 2001)

A new method for compiling schizophrenic synchronous programs. - Klaus Schneider 001; Michael Wenz (CASES, 2001)

A New Approach to the Specification and Verification of Real-Time Systems. - George Logothetis; Klaus Schneider 001 (ECRTS, 2001)

Improving Automata Generation for Linear Temporal Logic by Considering the Automaton Hierarchy. - Klaus Schneider 001 (LPAR, 2001)

Symbolic Model Checking of Real-Time Systems. - George Logothetis; Klaus Schneider 001 (TIME, 2001)

Extending Synchronous Languages for Generating Abstract Real-Time Models. - George Logothetis; Klaus Schneider 001 (DATE, 2002)

Symbolic Model Checking by Automata Based Set Representation. - Tobias Schuele; Klaus Schneider 001 (MBMV, 2002)

Proving the Equivalence of Microstep and Macrostep Semantics. - Klaus Schneider 001 (TPHOLs, 2002)

Exact High Level WCET Analysis of Synchronous Programs by Symbolic State Space Exploration. - George Logothetis; Klaus Schneider 001 (DATE, 2003)

Exact Low-Level Runtime Analysis of Synchronous Programs for Formal Verification of Real-Time Systems. - George Logothetis; Klaus Schneider 001; C. Metzler (FDL, 2003)

A μ-Calculus Approach to Supervisor Synthesis. - Roberto Ziller; Klaus Schneider 001 (MBMV, 2003)

Exact Runtime Analysis Using Automata-Based Symbolic Simulation. - Tobias Schüle; Klaus Schneider 001 (MEMOCODE, 2003)

A Generalised Approach to Supervisor Synthesis. - Roberto Ziller; Klaus Schneider 001 (MEMOCODE, 2003)

Generating Formal Models for Real-Time Verification by Exact Low-Level Runtime Analysis of Synchronous Programs. - George Logothetis; Klaus Schneider 001; C. Metzler (RTSS, 2003)

Runtime Analysis of Synchronous Programs for Low-Level Real-Time Verification. - George Logothetis; Klaus Schneider 001; C. Metzler (SBCCI, 2003)

Causality analysis of synchronous programs with delayed actions. - Klaus Schneider 001; Jens Brandt 001; Tobias Schüle (CASES, 2004)

Abstraction of assembler programs for symbolic worst case execution time analysis. - Tobias Schüle; Klaus Schneider 001 (DAC, 2004)

Global vs. Local Model Checking of Infinite State Systems. - Tobias Schüle; Klaus Schneider 001 (MBMV, 2004)

Bounded model checking of infinite state systems: exploiting the automata hierarchy. - Tobias Schüle; Klaus Schneider 001 (MEMOCODE, 2004)

Global vs. Local Model Checking: A Comparison of Verification Techniques for Infinite State Systems. - Tobias Schüle; Klaus Schneider 001 (SEFM, 2004)

A Verified Compiler for Synchronous Programs with Local Declarations. - Klaus Schneider 001; Jens Brandt 001; Tobias Schüle (SLAP@ETAPS, 2004)

Verification of Reactive Systems - Formal Methods and Algorithms - Klaus Schneider 001 (Springer, 2004)

Maximal Causality Analysis. - Klaus Schneider 001; Jens Brandt 001; Tobias Schüle; Thomas Tuerk (ACSD, 2005)

Using Model Checking to Solve Supervisor Synthesis Problems. - Andreas Morgenstern; Klaus Schneider 001 (CDC/ECC, 2005)

Dependable Polygon-Processing Algorithms for Safety-Critical Embedded Systems. - Jens Brandt 001; Klaus Schneider 001 (EUC, 2005)

A unified model checking framework for the supervisor synthesis problem. - Andreas Morgenstern; Klaus Schneider 001 (GALOP@ETAPS, 2005)

Using Three-Valued Logic to Specify and Verify Algorithms of Computational Geometry. - Jens Brandt 001; Klaus Schneider 001 (ICFEM, 2005)

Synthesizing deterministic controllers in supervisory control. - Andreas Morgenstern; Klaus Schneider 001 (ICINCO, 2005)

Three-valued logic in bounded model checking. - Tobias Schüle; Klaus Schneider 001 (MEMOCODE, 2005)

From PSL to LTL: A Formal Validation in HOL. - Thomas Tuerk; Klaus Schneider 001 (TPHOLs, 2005)

Combining supervisor synthesis and model checking. - Roberto Ziller; Klaus Schneider 001 (ACM Trans. Embed. Comput. Syst., 2005)

System Description Aspects as Syntactic Sugar. - Jens Brandt 001; Klaus Schneider 001 (FDL, 2006)

Verification of Data Paths Using Unbounded Integers: Automata Strike Back. - Tobias Schüle; Klaus Schneider 001 (Haifa Verification Conference, 2006)

Model Checking PSL Using HOL and SMV. - Thomas Tuerk; Klaus Schneider 001; Mike Gordon (Haifa Verification Conference, 2006)

Verifying the adaptation behavior of embedded systems. - Klaus Schneider 001; Tobias Schüle; Mario Trapp (SEAMS@ICSE, 2006)

Modular Compilation of Synchronous Programs. - Klaus Schneider 001; Jens Brandt 001; Eric Vecchié (DIPES, 2006)

A Framework for Verifying and Implementing Embedded Systems. - Klaus Schneider 001; Tobias Schüle (MBMV, 2006)

Efficient code generation from synchronous programs. - Klaus Schneider 001; Jens Brandt 001; Eric Vecchié (MEMOCODE, 2006)

Efficient Map Overlay for Safety-Critical Embedded Systems. - Jens Brandt 001; Klaus Schneider 001 (IES, 2006)

How Different are Esterel and SystemC?. - Jens Brandt 001; Klaus Schneider 001 (FDL, 2007)

Three-valued automated reasoning on analog properties. - Raffaella Gentilini; Klaus Schneider 001; Alexander Dreyer (ACM Great Lakes Symposium on VLSI, 2007)

Formal verification of safety behaviours of the outdoor robot ravon. - Martin Proetzsch; Karsten Berns; Tobias Schuele; Klaus Schneider 001 (ICINCO-RA (1), 2007)

Successive Abstractions of Hybrid Automata for Monotonic CTL Model Checking. - Raffaella Gentilini; Klaus Schneider 001; Bud Mishra (LFCS, 2007)

Combining Interval Arithmetic and Three-Valued Temporal Logics for the Verification of Analog Systems. - Raffaella Gentilini; Klaus Schneider 001; Alexander Dreyer (MBMV, 2007)

Preface. - Arnd Poetzsch-Heffter; Klaus Schneider 001 (VerAS@TPHOLs, 2007)

Bounded model checking of infinite state systems. - Tobias Schüle; Klaus Schneider 001 (Formal Methods Syst. Des., 2007)

Performing causality analysis by bounded model checking. - Klaus Schneider 001; Jens Brandt 001 (ACSD, 2008)

A Uniform Approach to Three-Valued Semantics for µ-Calculus on Abstractions of Hybrid Automata. - Kerstin Bauer; Raffaella Gentilini; Klaus Schneider 001 (Haifa Verification Conference, 2008)

Hardware Acceleration for Model Checking. - Jens Brandt 001; Klaus Schneider 001; Adrian Willenbücher (MBMV, 2008)

Generating Deterministic $ omega$-Automata for most LTL Formulas by the Breakpoint Construction. - Andreas Morgenstern; Klaus Schneider 001; Sven Lamberti (MBMV, 2008)

Formal Reasoning About Causality Analysis. - Jens Brandt 001; Klaus Schneider 001 (TPHOLs, 2008)

From LTL to Symbolically Represented Deterministic Automata. - Andreas Morgenstern; Klaus Schneider 001 (VMCAI, 2008)

Approximated Reachability on Hybrid Automata: Falsification meets Certification. - Kerstin Bauer; Raffaella Gentilini; Klaus Schneider 001 (RP, 2008)

Desynchronizing Synchronous Programs by Modes. - Jens Brandt 001; Mike Gemunde; Klaus Schneider 001 (ACSD, 2009)

Online Exercise System - A Web-based Tool for Administration and Automatic Correction of Exercises. - Daniel Baudisch; Manuel Gesell; Klaus Schneider 001 (CSEDU (1), 2009)

09481 Abstracts Collection - SYNCHRON 2009. - Albert Benveniste; Stephen A. Edwards; Edward A. Lee; Klaus Schneider 001; Reinhard von Hanxleden (SYNCHRON 2009, 2009)

Separate compilation and execution of imperative synchronous modules. - Eric Vecchié; Jean-Pierre Talpin; Klaus Schneider 001 (DATE, 2009)

Using IP Cores in Synchronous Languages. - Jens Brandt 001; Klaus Schneider 001; Adrian Willenbücher (MBMV, 2009)

Static data-flow analysis of synchronous programs. - Jens Brandt 001; Klaus Schneider 001 (MEMOCODE, 2009)

Separate compilation for synchronous programs. - Jens Brandt 001; Klaus Schneider 001 (SCOPES, 2009)

Property Driven Three-Valued Model Checking on Hybrid Automata. - Kerstin Bauer; Raffaella Gentilini; Klaus Schneider 001 (WoLLIC, 2009)

Predicting Events for the Simulation of Hybrid Systems. - Kerstin Bauer; Klaus Schneider 001 (CIT, 2010)

The Model Checking View to Clock Gating and Operand Isolation. - Jens Brandt 001; Klaus Schneider 001; Sumit Ahuja; Sandeep K. Shukla (ACSD, 2010)

A Formal Semantics of Clock Refinement in Imperative Synchronous Languages. - Mike Gemunde; Jens Brandt 001; Klaus Schneider 001 (ACSD, 2010)

Multithreaded code from synchronous programs: Extracting independent threads for OpenMP. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (DATE, 2010)

From synchronous programs to symbolic representations of hybrid systems. - Kerstin Bauer; Klaus Schneider 001 (HSCC, 2010)

Dependency-Driven Distribution of Synchronous Programs. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (DIPES/BICC, 2010)

Translating concurrent action oriented specifications to synchronous guarded actions. - Jens Brandt 001; Klaus Schneider 001; Sandeep K. Shukla (LCTES, 2010)

Multithreaded Code from Synchronous Programs: Generating Software Pipelines for OpenMP. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (MBMV, 2010)

From Synchronous Guarded Actions to SystemC. - Jens Brandt 001; Mike Gemünde; Klaus Schneider 001 (MBMV, 2010)

Compilation of imperative synchronous programs with refined clocks. - Mike Gemunde; Jens Brandt 001; Klaus Schneider 001 (MEMOCODE, 2010)

Message from the chairs. - Klaus Schneider 001; Barbara Jobstmann; Luca P. Carloni; Jens Brandt 001 (MEMOCODE, 2010)

Exploiting the Temporal Logic Hierarchy and the Non-Confluence Property for Efficient LTL Synthesis - Andreas Morgenstern; Klaus Schneider 001 (GANDALF, 2010)

Data-Flow Analysis of Extended Finite State Machines. - Yu Bai 003; Jens Brandt 001; Klaus Schneider 001 (ACSD, 2011)

Integrating system descriptions by clocked guarded actions. - Jens Brandt 001; Mike Gemunde; Klaus Schneider 001; Sandeep K. Shukla; Jean-Pierre Talpin (FDL, 2011)

Schizophrenia and causality in the context of refined clocks. - Mike Gemunde; Jens Brandt 001; Klaus Schneider 001 (FDL, 2011)

Causality analysis of synchronous programs with refined clocks. - Mike Gemünde; Jens Brandt 001; Klaus Schneider 001 (HLDVT, 2011)

Welcome to ICCD 2011! - Georgi Gaydadjiev; Sofiène Tahar; Greg Byrd; Klaus Schneider 001 (ICCD, 2011)

Safe Automotive Software. - Karl Heckemann; Manuel Gesell; Thomas Pfister; Karsten Berns; Klaus Schneider 001; Mario Trapp (KES (4), 2011)

Round Trip to Asynchrony and Synchrony. - Jens Brandt 001; Klaus Schneider 001 (MBMV, 2011)

Synthesis of Parallel Sorting Networks using SAT Solvers. - Andreas Morgenstern; Klaus Schneider 001 (MBMV, 2011)

Translating Synchronous Systems to Data-Flow Process Networks. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (PDCAT, 2011)

SMT-based optimization for synchronous programs. - Yu Bai 003; Jens Brandt 001; Klaus Schneider 001 (SCOPES, 2011)

Program Sketching via CTL* Model Checking. - Andreas Morgenstern; Klaus Schneider 001 (SPIN, 2011)

A LTL Fragment for GR(1)-Synthesis - Andreas Morgenstern; Klaus Schneider 001 (iWIGP, 2011)

A uniform approach to three-valued semantics for μ-calculus on abstractions of hybrid automata. - Kerstin Bauer; Raffaella Gentilini; Klaus Schneider 001 (Int. J. Softw. Tools Technol. Transf., 2011)

Teaching cyber-physical systems: a programming approach. - Kerstin Bauer; Klaus Schneider 001 (WESE, 2012)

Monitoring distributed reactive systems. - Yu Bai 003; Jens Brandt 001; Klaus Schneider 001 (HLDVT, 2012)

Efficient Handling of Arrays in Dataflow Process Networks. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (HPCC-ICESS, 2012)

An Asymptotically Correct Finite Path Semantics for LTL. - Andreas Morgenstern; Manuel Gesell; Klaus Schneider 001 (LPAR, 2012)

Preservation of LTL properties in desynchronized systems. - Yu Bai 003; Jens Brandt 001; Klaus Schneider 001 (MEMOCODE, 2012)

Interactive verification of synchronous systems. - Manuel Gesell; Klaus Schneider 001 (MEMOCODE, 2012)

A hoare calculus for the verification of synchronous languages. - Manuel Gesell; Klaus Schneider 001 (PLPV, 2012)

Out-Of-order execution of synchronous data-flow networks. - Daniel Baudisch; Jens Brandt 001; Klaus Schneider 001 (ICSAMOS, 2012)

Modular Verification of Synchronous Programs. - Manuel Gesell; Klaus Schneider 001 (ACSD, 2013)

Automatic Hard Block Inference on FPGAs. - Adrian Willenbücher; Klaus Schneider 001 (DSD, 2013)

Interactive Verification of Cyber-physical Systems: Interfacing Averest and KeYmaera. - Xian Li 002; Kerstin Bauer; Klaus Schneider 001 (FedCSIS, 2013)

Towards the Applicability of Alf to Model Cyber-Physical Systems. - Alessandro Gerlinger Romero; Klaus Schneider 001; Maurício Gonçalves Vieira Ferreira (FedCSIS, 2013)

Solving Games Using Incremental Induction. - Andreas Morgenstern; Manuel Gesell; Klaus Schneider 001 (IFM, 2013)

Constructive Polychronous Systems. - Jean-Pierre Talpin; Jens Brandt 001; Mike Gemünde; Klaus Schneider 001; Sandeep K. Shukla (LFCS, 2013)

An Interactive Verification Tool for Synchronous/Reactive Systems. - Manuel Gesell; Klaus Schneider 001 (MBMV, 2013)

Translating synchronous guarded actions to interleaved guarded actions. - Manuel Gesell; Klaus Schneider 001 (MEMOCODE, 2013)

Targeting different abstraction layers by model-based design methods for embedded systems: A case study. - Omair Rafique; Manuel Gesell; Klaus Schneider 001 (RTCSA, 2013)

Generating hardware specific code at different abstraction levels using Averest. - Omair Rafique; Manuel Gesell; Klaus Schneider 001 (M-SCOPES, 2013)

Lifting Verification Results for Preemption Statements. - Manuel Gesell; Andreas Morgenstern; Klaus Schneider 001 (SEFM, 2013)

Synchronous Programming (Dagstuhl Seminar 13471). - Stephen A. Edwards; Alain Girault; Klaus Schneider 001 (Dagstuhl Reports, 2013)

Clock refinement in imperative synchronous languages. - Mike Gemünde; Jens Brandt 001; Klaus Schneider 001 (EURASIP J. Embed. Syst., 2013)

Embedding Polychrony into Synchrony. - Jens Brandt 001; Mike Gemunde; Klaus Schneider 001; Sandeep K. Shukla; Jean-Pierre Talpin (IEEE Trans. Software Eng., 2013)

Memory Model-Aware Testing - A Unified Complexity Analysis. - Florian Furbach; Roland Meyer 001; Klaus Schneider 001; Maximilian Senftleben (ACSD, 2014)

Isochronous networks by construction. - Yu Bai 003; Klaus Schneider 001 (DATE, 2014)

Abacus: A Processor Family for Education. - Nikita Bhardwaj; Maximilian Senftleben; Klaus Schneider 001 (WESE, 2014)

A New Algorithm for Carry-Free Addition of Binary Signed-Digit Numbers. - Klaus Schneider 001; Adrian Willenbücher (FCCM, 2014)

Using Different Representations of Synchronous Systems in SAL. - Manuel Gesell; Felipe Bichued; Klaus Schneider 001 (MBMV, 2014)

Synthesis of Distributed Synchronous Specifications to SysteMoC. - Mohamed Ammar Ben Khadra; Yu Bai 003; Klaus Schneider 001 (MBMV, 2014)

From clock-driven to data-driven models. - Yu Bai 003; Klaus Schneider 001; Nikita Bhardwaj; Badarinath Katti; Tania Shazadi (MEMOCODE, 2014)

Using the Base Semantics given by fUML for Verification. - Alessandro Gerlinger Romero; Klaus Schneider 001; Maurício Gonçalves Vieira Ferreira (MODELSWARD, 2014)

Reducing the Communication of Message-Passing Systems Synthesized from Synchronous Programs. - Daniel Baudisch; Yu Bai 003; Klaus Schneider 001 (PDP, 2014)

Integrating UML Composite Structures and fUML. - Alessandro Gerlinger Romero; Klaus Schneider 001; Maurício Gonçalves Vieira Ferreira (SOFSEM, 2014)

High level modeling of elastic circuits in SystemC. - Mohamed Ammar Ben Khadra; Yu Bai 003; Klaus Schneider 001 (SpringSim (TMS-DEVS), 2014)

Representation of synchronous, asynchronous, and polychronous components by clocked guarded actions. - Jens Brandt 001; Mike Gemünde; Klaus Schneider 001; Sandeep K. Shukla; Jean-Pierre Talpin (Des. Autom. Embed. Syst., 2014)

Passive code in synchronous programs. - Jens Brandt 001; Klaus Schneider 001; Yu Bai 003 (ACM Trans. Embed. Comput. Syst., 2014)

A Counterexample-Guided Approach to Symbolic Simulation of Hybrid Systems. - Xian Li 002; Klaus Schneider 001 (MBMV, 2015)

Verification condition generation for hybrid systems. - Xian Li 002; Klaus Schneider 001 (MEMOCODE, 2015)

A Time-Predictable Model of Computation. - Anoop Bhagyanath; Tripti Jain; Klaus Schneider 001 (RTSS, 2015)

An SMT-based Approach to analyze Non-Linear Relations of Parameters for Hybrid Systems. - Xian Li 002; Klaus Schneider 001 (SyDe Summer School, 2015)

Evaluation of Speculation in Out-of-Order Execution of Synchronous Dataflow Networks. - Daniel Baudisch; Klaus Schneider 001 (Int. J. Parallel Program., 2015)

Control-flow guided clause generation for property directed reachability. - Xian Li 002; Klaus Schneider 001 (HLDVT, 2016)

Towards Code Generation for the Synchronous Control Asynchronous Dataflow (SCAD) Architectures. - Anoop Bhagyanath; Tripti Jain; Klaus Schneider 001 (MBMV, 2016)

Verification of Behavior-Based Control Systems in their Physical Environment. - Thorsten Ropertz; Karsten Berns; Xian Li 002; Klaus Schneider 001 (MBMV, 2016)

Optimal compilation for exposed datapath architectures with buffered processing units by SAT solvers. - Anoop Bhagyanath; Klaus Schneider 001 (MEMOCODE, 2016)

Verifying the concentration property of permutation networks by BDDs. - Tripti Jain; Klaus Schneider 001 (MEMOCODE, 2016)

Control-flow guided property directed reachability for imperative synchronous programs. - Xian Li 002; Klaus Schneider 001 (MEMOCODE, 2016)

The selector-tree network: A new self-routing and non-blocking interconnection network. - Tripti Jain; Klaus Schneider 001; Anoop Bhagyanath (ReCoSoC, 2016)

Introducing MoC Drivers for the Integration of Sensor-Actuator Behaviors in Model-Based Design Flows of Embedded Systems. - Omair Rafique; Klaus Schneider 001 (SCOPES, 2016)

Towards the standardization of plug-and-play devices for model-based designs of embedded systems. - Omair Rafique; Klaus Schneider 001 (SIES, 2016)

Specifying Weak Memory Consistency with Temporal Logic. - Maximilian Senftleben; Klaus Schneider 001 (VECoS, 2016)

Semantics in space systems architectures. - Alessandro Gerlinger Romero; Klaus Schneider 001; Maurício Gonçalves Vieira Ferreira (Innov. Syst. Softw. Eng., 2016)

Exploring the Potential of Instruction-Level Parallelism of Exposed Datapath Architectures with Buffered Processing Units. - Anoop Bhagyanath; Klaus Schneider 001 (ACSD, 2017)

Out-of-Order Execution of Buffered Function Units in Exposed Data Path Architectures. - Tripti Jain; Klaus Schneider 001; Frederik Walk (IPDPS Workshops, 2017)

Automatic Synthesis of Optimal-Size Concentrators by Answer Set Programming. - Marc Dahlem; Tripti Jain; Klaus Schneider 001; Michael Gillmann (LPNMR, 2017)

An Efficient Self-Routing and Non-Blocking Interconnection Network on Chip. - Tripti Jain; Klaus Schneider 001; Ankesh Jain (NoCArc@MICRO, 2017)

Deriving concentrators from binary sorters using half cleaners. - Tripti Jain; Klaus Schneider 001; Ankesh Jain (ReConFig, 2017)

Exploring different execution paradigms in exposed datapath architectures with buffered processing units. - Anoop Bhagyanath; Klaus Schneider 001 (SAMOS, 2017)

Quartz: A Synchronous Language for Model-Based Design of Reactive Embedded Systems. - Klaus Schneider 001; Jens Brandt 001 (Handbook of Hardware/Software Codesign, 2017)

On Memory Optimal Code Generation for Exposed Datapath Architectures with Buffered Processing Units. - Markus Anders; Anoop Bhagyanath; Klaus Schneider 001 (ACSD, 2018)

Operational Characterization of Weak Memory Consistency Models. - Maximilian Senftleben; Klaus Schneider 001 (ARCS, 2018)

Are Synchronous Programs Logic Programs? - Klaus Schneider 001; Marc Dahlem (Principled Software Development, 2018)

A Model-based Synthesis Framework for the Execution of Dynamic Dataflow Actors. - Omair Rafique; Klaus Schneider 001 (IINTEC, 2018)

Routing Partial Permutations in General Interconnection Networks based on Radix Sorting. - Tripti Jain; Klaus Schneider 001 (MBMV, 2018)

Optimal Self-Routing Split Modules for Radix-based Interconnection Networks. - Tripti Jain; Klaus Schneider 001 (MEMOCODE, 2018)

Routing Partial Permutations in Interconnection Networks based on Radix Sorting. - Tripti Jain; Klaus Schneider 001 (ReCoSoC, 2018)

Using temporal logics for specifying weak memory consistency models. - Maximilian Senftleben; Klaus Schneider 001 (Int. J. Crit. Comput. Based Syst., 2018)

The Half Cleaner Lemma: Constructing Efficient Interconnection Networks from Sorting Networks. - Tripti Jain; Klaus Schneider 001 (Parallel Process. Lett., 2018)

Optimal Scheduling for Exposed Datapath Architectures with Buffered Processing Units by ASP. - Marc Dahlem; Anoop Bhagyanath; Klaus Schneider 001 (Theory Pract. Log. Program., 2018)

A Formal Semantics of Exposed Datapath Architectures with Buffered Processing Units. - Markus Anders; Klaus Schneider 001 (ACSD, 2019)

Generating Efficient Parallel Code from the RVC-CAL Dataflow Language. - Omair Rafique; Florian Krebs; Klaus Schneider 001 (DSD, 2019)

Flexible Data Flow Architecture for Embedded Hardware Accelerators. - Jens Froemmer; Nico Bannow; Axel Aue; Christoph Grimm 001; Klaus Schneider 001 (ICA3PP (1), 2019)

Inductive Proof Rules Beyond Safety Properties. - Martin Köhler; Klaus Schneider 001 (MBMV, 2019)

Automatic Software Synthesis of Static and Dynamic Dataflow Process Networks. - Omair Rafique; Klaus Schneider 001 (MDE4IoT/ModComp@MoDELS, 2019)

Evaluating OpenCL as a Standard Hardware Abstraction for a Model-based Synthesis Framework: A Case Study. - Omair Rafique; Klaus Schneider 001 (MODELSWARD, 2019)

Guest Editorial: Special Issue of ACM TECS on the ACM-IEEE International Conference on Formal Methods and Models for System Design (MEMOCODE 2017). - Patricia Derler; Klaus Schneider 001; Jean-Pierre Talpin (ACM Trans. Embed. Comput. Syst., 2019)

SHeD: A Framework for Automatic Software Synthesis of Heterogeneous Dataflow Process Networks. - Omair Rafique; Klaus Schneider 001 (DSD, 2020)

Area Estimation Framework for Digital Hardware Design using Machine Learning. - Jens Froemmer; Yara Gowayed; Nico Bannow; Wolfgang Kunz; Christoph Grimm 001; Klaus Schneider 001 (MBMV, 2020)

Properties of Invariants and Induction Lemmata. - Martin Köhler; Felix Hasselwander; Klaus Schneider 001 (MBMV, 2020)

Employing OpenCL as a Standard Hardware Abstraction in a Distributed Embedded System: A Case Study. - Omair Rafique; Klaus Schneider 001 (MECO, 2020)

Compiling synchronous languages to optimal move code for exposed datapath architectures. - Marc Dahlem; Klaus Schneider 001 (SCOPES, 2020)

Synthesis of Heterogeneous Dataflow Models from Synchronous Specifications. - Omair Rafique; Yu Bai 003; Klaus Schneider 001; Guangxi Yan (COMPSAC, 2021)

A Model-based Design Flow for Asynchronous Implementations from Synchronous Specifications. - Yu Bai 003; Omair Rafique; Klaus Schneider 001 (DATE, 2021)

Efficient Implementation of Heterogeneous Dataflow Models using Synchronous IO Patterns. - Omair Rafique; Yu Bai 003; Klaus Schneider 001; Guangxi Yan (DSD, 2021)

Translating structured sequential programs to dataflow graphs. - Klaus Schneider 001 (MEMOCODE, 2021)

Translation of continuous function charts to imperative synchronous quartz programs. - Marcel Christian Werner; Klaus Schneider 001 (MEMOCODE, 2021)

Integrating Kahn Process Networks as a Model of Computation in an Extendable Model-based Design Framework. - Omair Rafique; Klaus Schneider 001 (MODELSWARD, 2021)

From IEC 61131-3 Function Block Diagrams to Sequentially Constructive Statecharts. - Marcel Christian Werner; Klaus Schneider 001 (FDL, 2022)

Code generation criteria for buffered exposed datapath architectures from dataflow graphs. - Klaus Schneider 001; Anoop Bhagyanath; Julius Roob (LCTES, 2022)

Virtual Buffers for Exposed Datapath Architectures. - Klaus Schneider 001; Anoop Bhagyanath; Julius Roob (MBMV, 2022)

Data-aware Global Scheduling of Dataflow Process Networks. - Omair Rafique; Klaus Schneider 001 (MBMV, 2022)

Buffer Allocation for Exposed Datapath Architectures. - Anoop Bhagyanath; Klaus Schneider 001 (MCSoC, 2022)

Synthesis of Parallel Software from Heterogeneous Dataflow Models. - Omair Rafique; Klaus Schneider 001 (SN Comput. Sci., 2022)

Program Balancing in Compilation for Buffered Hybrid Dataflow Processors. - Anoop Bhagyanath; Klaus Schneider 001 (COMPSAC, 2023)

Formal Methods-Based Optimization of Dataflow Models with Translation to Synchronous Models. - Marcel Christian Werner; Klaus Schneider 001 (FDL, 2023)

Towards Buffers as a Scalable Alternative to Registers for Processor-Local Memory. - Julius Roob; Anoop Bhagyanath; Klaus Schneider 001 (MBMV, 2023)

Allocation and Scheduling of Dataflow Graphs on Hybrid Dataflow/von Neumann Architectures. - Anoop Bhagyanath; Nadine Kercher; Klaus Schneider 001 (MEMOCODE, 2023)

Towards a Basis for Endochronous Functions in Dataflow Process Networks. - Daniel Theis; Klaus Schneider 001 (MEMOCODE, 2023)

Network-On-Chip Performance Evaluation by Synchronous Circuit Simulation. - Leon Werner; Julius Roob; Klaus Schneider 001 (NoCArc@MICRO, 2023)

Consistency Constraints for Mapping Dataflow Graphs to Hybrid Dataflow/von Neumann Architectures. - Klaus Schneider 001; Anoop Bhagyanath (ACM Trans. Embed. Comput. Syst., 2023)

Designing Imperfect Cyber-Physical Systems. - Samarjit Chakraborty; Klaus Schneider 001 (FDL, 2025)

Digital Twin and Digital Thread for System Security and Performance applied to an Electrical Vehicle Charging Use Case. - Hagen Heermann; Johannes Koch; Christoph Grimm 001; Daniela Genius; Ludovic Apvrille; Ahlem Mifdaoui; Klaus Schneider 001 (FDL, 2025)

Performance Modeling and Analysis of Exposed Datapath Architectures. - Klaus Schneider 001; Demyana Selim; Nadine Kercher (FDL, 2025)

Normal Forms and Decompositions of Monotone Ternary Functions. - Klaus Schneider 001; Nadine Kercher (ISMVL, 2025)