Temperature sensitivity analysis of SGO metal strip JL TFET. - Kaushal Nigam; Satyendra Kumar; Km Sucheta Singh; Eshaan Bhardwaj; Shubham Choubey; Savitesh Chaturvedi (IET Circuits Devices Syst., 2020)

Performance Assessment of GaAs Pocket-Doped Dual-Material Gate-Oxide-Stack DG-TFET at Device and Circuit Level. - Km Sucheta Singh; Satyendra Kumar; Saurabh Chaturvedi; Kapil Dev Tyagi; Vaibhav Bhushan Tyagi (IET Circuits Devices Syst., 2024)

Mole Fraction and Device Reliability Analysis of Vertical-Tunneling-Attributed Dual-Material Double-Gate Heterojunction-TFET with Si0.7Ge0.3 Source Region at Device and Circuit Level. - Km Sucheta Singh; Satyendra Kumar (J. Circuits Syst. Comput., 2024)