An Executable Formalisation of the SPARCv8 Instruction Set Architecture: A Case Study for the LEON3 Processor. - Zhe Hou; David Sanán; Alwen Tiu; Yang Liu 003; Koh Chuen Hoa (FM, 2016)

An Isabelle/HOL Formalisation of the SPARC Instruction Set Architecture and the TSO Memory Model. - Zhé Hóu; David Sanán; Alwen Tiu; Yang Liu 003; Koh Chuen Hoa; Jin Song Dong (J. Autom. Reason., 2021)