A novel hierarchical multi-port cache. - Zhaomin Zhu; Koh Johguchi; Hans Jürgen Mattausch; Tetsushi Koide; Tai Hirakawa; Tetsuo Hironaka (ESSCIRC, 2003)

Unified Data/Instruction Cache with Hierarchical Multi-Port Architecture and Hidden Precharge Pipeline. - Koh Johguchi; Zhaomin Zhu; Hans Jürgen Mattausch; Tetsushi Koide; Tetsuo Hironaka; Kazuya Tanigawa (APCCAS, 2006)

A 0.6-Tbps, 16-port SRAM design with 2-stage- pipeline and multi-stage-sensing scheme. - Koh Johguchi; Yuya Mukuda; Shinya Izumi; Hans Jürgen Mattausch; Tetsushi Koide (ESSCIRC, 2007)

A 2-stage-pipelined 16 port SRAM with 590Gbps random access bandwidth and large noise margin. - Koh Johguchi; Yuya Mukuda; Ken-ichi Aoyama; Hans Jürgen Mattausch; Tetsushi Koide (IEICE Electron. Express, 2007)

4-Port Unified Data/Instruction Cache Design with Distributed Crossbar and Interleaved Cache-Line Words. - Koh Johguchi; Hans Jürgen Mattausch; Tetsushi Koide; Tetsuo Hironaka (IEICE Trans. Electron., 2007)

Measurement-Based Ring Oscillator Variation Analysis. - Koh Johguchi; Akihiro Kaya; Shinya Izumi; Hans Jürgen Mattausch; Tetsushi Koide; Norio Sadachika (IEEE Des. Test Comput., 2010)

A 3D-Integration method to compensate output voltage degradation of boost converter for compact Solid-State-Drives. - Teruyoshi Hatanaka; Koh Johguchi; Ken Takeuchi (3DIC, 2011)

Prediction of Circuit-Performance Variations from Technology Variations for Reliable 100 nm SOC Circuit Design. - Norio Sadachika; Shu Mimura; Akihiro Yumisaki; Koh Johguchi; Akihiro Kaya; Mitiko Miura-Mattausch; Hans Jürgen Mattausch (IEICE Trans. Electron., 2011)

x11 performance increase, x6.9 endurance enhancement, 93% energy reduction of 3D TSV-integrated hybrid ReRAM/MLC NAND SSDs by data fragmentation suppression. - Hiroki Fujii; Kousuke Miyaji; Koh Johguchi; Kazuhide Higuchi; Chao Sun 001; Ken Takeuchi (VLSIC, 2012)

Over 10-times high-speed, energy efficient 3D TSV-integrated hybrid ReRAM/MLC NAND SSD by intelligent data fragmentation suppression. - Chao Sun 001; Hiroki Fujii; Kousuke Miyaji; Koh Johguchi; Kazuhide Higuchi; Ken Takeuchi (ASP-DAC, 2013)

A workload-aware-design of 3D-NAND flash memory for enterprise SSDs. - Chao Sun 001; Ayumi Soga; Takahiro Onagi; Koh Johguchi; Ken Takeuchi (ISQED, 2014)

A Temperature Tracking Read Reference Current and Write Voltage Generator for Multi-Level Phase Change Memories. - Koh Johguchi; Toru Egami; Kousuke Miyaji; Ken Takeuchi (IEICE Trans. Electron., 2014)

NAND Phase Change Memory with Block Erase Architecture and Pass-Transistor Design Requirements for Write and Disturbance. - Koh Johguchi; Kasuaki Yoshioka; Ken Takeuchi (IEICE Trans. Electron., 2014)

Cost, Capacity, and Performance Analyses for Hybrid SCM/NAND Flash SSD. - Chao Sun 001; Tomoko Ogura Iwasaki; Takahiro Onagi; Koh Johguchi; Ken Takeuchi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD. - Chao Sun 001; Kousuke Miyaji; Koh Johguchi; Ken Takeuchi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Understanding the Relation Between the Performance and Reliability of nand Flash/SCM Hybrid Solid-State Drive. - Shuhei Tanakamaru; Shogo Hosaka; Koh Johguchi; Hirofumi Takishita; Ken Takeuchi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Hierarchial Hybrid Solid State Drive. - Hassan Arafat; Ryohei Shimizu; Koh Johguchi (TENCON, 2018)

A CMOS Integrated Sweat Monitoring System for Medical Applications. - Tera Sakata; Yusuke Mitani; Kousuke Miyaji; Satoshi Kaneko; Takaharu Uekura; Hidetoshi Taki; Hideya Momose; Koh Johguchi (ISDCS, 2019)

A Smart Hybrid Solid-State-Drive Storage System based on Nonvolatile Storage-Class-Memories : Device, Circuit Design and Architecture. - Koh Johguchi (ISDCS, 2020)

Temperature Sensor Circuit for a Wearable Perspiration Monitoring System. - Yuichiro Ichimura; Kenta Goto; Koh Johguchi (ISDCS, 2023)

Photodiode and Analog-Front-End Circuit Design for Wearable Vital Sensing System with Fiber-Bragg-Grating Sensor. - Kaede Kano; Koh Johguchi (ISDCS, 2023)