2-Port Modeling Technique for Surface-Mount Passive Components Using Partial Inductance Concept. - Koh Yamanaga; Takashi Sato 001; Kazuya Masu (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2009)

Linear time calculation of state-dependent power distribution network capacitance. - Shiho Hagiwara; Koh Yamanaga; Ryo Takahashi; Kazuya Masu; Takashi Sato 001 (ISQED, 2010)

Application of generalized scattering matrix for prediction of power supply noise. - Koh Yamanaga; Kazuya Masu; Takashi Sato 001 (SLIP, 2010)

Linear Time Calculation of On-Chip Power Distribution Network Capacitance Considering State-Dependence. - Shiho Hagiwara; Koh Yamanaga; Ryo Takahashi; Kazuya Masu; Takashi Sato 001 (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2010)

A Universal Equivalent Circuit Model for Ceramic Capacitors. - Koh Yamanaga; Shuhei Amakawa; Kazuya Masu; Takashi Sato 001 (IEICE Trans. Electron., 2010)

Acceleration of random-walk-based linear circuit analysis using importance sampling. - Tetsuro Miyakawa; Koh Yamanaga; Hiroshi Tsutsui; Hiroyuki Ochi; Takashi Sato 001 (ACM Great Lakes Symposium on VLSI, 2011)

State-Dependence of On-Chip Power Distribution Network Capacitance. - Koh Yamanaga; Shiho Hagiwara; Ryo Takahashi; Kazuya Masu; Takashi Sato 001 (IEICE Trans. Electron., 2014)