A 33Mpixel CMOS imager with multi-functional 3-stage pipeline ADC for 480fps high-speed mode and 120fps low-noise mode. - Toshio Yasue; Kohei Tomioka; Ryohei Funatsu; Tomohiro Nakamura; Takahiro Yamasaki; Hiroshi Shimamoto; Tomohiko Kosugi; Sung-Wook Jun; Takashi Watanabe 003; Masanori Nagase; Toshiaki Kitajima; Satoshi Aoyama; et al. (ISSCC, 2018)

Noise suppression effect of folding-integration applied to a column-parallel 3-stage pipeline ADC in a 2.1 μm 33-megapixel CMOS image sensor. - Kohei Tomioka; Toshio Yasue; Ryohei Funatsu; Tomoki Matsubara; Tomohiko Kosugi; Sung-Wook Jun; Takashi Watanabe 003; Masanori Nagase; Toshiaki Kitajima; Satoshi Aoyama; Shoji Kawahito (IMSE, 2019)

Multi-Plane Phase Detection Autofocus for 8K Three-Chip Color Imaging Cameras. - Kodai Kikuchi; Ryohei Funatsu; Toshio Yasue; Kohei Tomioka; Tomoki Matsubara; Takayuki Yamashita (GCCE, 2020)

Noise Reduction Effect of Folding-integration ADC in an 8K Image Sensor driven at Various Frame Rates. - Kohei Tomioka; Toshio Yasue; Ryohei Funatsu; Kodai Kikuchi; Tomoki Matsubara; Takayuki Yamashita; Shoji Kawahito (IEEE SENSORS, 2020)

Hardware Implementation of Low-latency Image Denoising with Wavelet Shrinkage and Noise2Noise-based Learning for Ultra-high Definition Cameras. - Kodai Kikuchi; Kohei Tomioka; Akira Honji; Takenobu Usui; Keigo Hirakawa; Kazuya Kitamura (ICCE, 2024)

A 1.25 μm 59.3 Mpixel 60 fps CIS with 2×1 Multi-Directional Phase-Detection Pixels. - Kodai Kikuchi; Kohei Tomioka; Takenobu Usui; Akira Honji; Hiroshi Shimamoto; Tomonari Kenzaki; Sota Hida; Takeo Ushinaga; Kenichi Nagai; Kazuya Kitamura (IEEE SENSORS, 2024)

Hardware Implementation of Low-Latency Image Denoising With Noise2Noise-Extended Learning for Ultra-High Definition Cameras. - Kodai Kikuchi; Kohei Tomioka; Akira Honji; Takenobu Usui; Kazuya Kitamura; Keigo Hirakawa (IEEE Consumer Electron. Mag., 2025)