FPGA implementation of object recognition processor for HDTV resolution video using sparse FIND feature. - Yuri Nishizumi; Go Matsukawa; Koichi Kajihara; Taisuke Kodama; Shintaro Izumi; Hiroshi Kawaguchi 001; Chikako Nakanishi; Toshio Goto; Takeo Kato; Masahiko Yoshimoto (SiPS, 2017)

A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video. - Go Matsukawa; Taisuke Kodama; Yuri Nishizumi; Koichi Kajihara; Chikako Nakanishi; Shintaro Izumi; Hiroshi Kawaguchi 001; Toshio Goto; Takeo Kato; Masahiko Yoshimoto (IEICE Electron. Express, 2017)

Hardware Implementation of Autoregressive Model Estimation Using Burg's Method for Low-Energy Spectral Analysis. - Koichi Kajihara; Shintaro Izumi; Seiya Yoshida; Yuji Yano; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (SiPS, 2018)

A low power, VLSI object recognition processor using Sparse FIND feature for 60 fps HDTV resolution video [IEICE Electronics Express Vol. 14(2017) No. 15 pp. 20170668]. - Go Matsukawa; Taisuke Kodama; Yuri Nishizumi; Koichi Kajihara; Chikako Nakanishi; Shintaro Izumi; Hiroshi Kawaguchi 001; Toshio Goto; Takeo Kato; Masahiko Yoshimoto (IEICE Electron. Express, 2018)

Energy-Efficient Spectral Analysis Method Using Autoregressive Model-Based Approach for Internet of Things. - Seiya Yoshida; Shintaro Izumi; Koichi Kajihara; Yuji Yano; Hiroshi Kawaguchi 001; Masahiko Yoshimoto (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)