The DS/CDMA system using transmission diversity for indoor wireless communications. - Koichiro Ban; Masaaki Katayama; Takaya Yamazato; Akira Ogawa (PIMRC, 1996)

Video transmission for multi-hop networks using IEEE 802.11 FHSS. - Hamid Gharavi; Koichiro Ban (ICIP (1), 2002)

CDMA packet recognition and signal acquisition using LMS-based adaptive receiver. - Tadafumi Kume; Takaya Yamazato; Koichiro Ban; Hiraku Okada; Masaaki Katayama (WCNC, 2002)

IEEE 802.11 FHSS receiver design for cluster-based multihop video communications. - Koichiro Ban; Hamid Gharavi (Wirel. Commun. Mob. Comput., 2002)

Multihop sensor network design for wide-band communications. - Hamid Gharavi; Koichiro Ban (Proc. IEEE, 2003)

Dynamic adjustment packet control for video communications over ad-hoc networks. - Hamid Gharavi; Koichiro Ban (ICC, 2004)

RTCP-based frame-synchronized feedback control for IP-video communications over multipath fading channels. - Hamid Gharavi; Koichiro Ban; John Cambiotis (ICC, 2004)

Group-based ad-hoc network for multimedia communications. - Koichiro Ban; Hamid Gharavi (PIMRC, 2005)

A 2Gb/s-throughput CMOS transceiver chipset with in-package antenna for 60GHz short-range wireless communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (ISSCC, 2012)

A 2-Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60-GHz Short-Range Wireless Communication. - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2012)

Digital Baseband IC Design of OFDM PHY for a 60GHz Proximity Communication System. - Koichiro Ban; Seiichiro Horikawa; Kentaro Taniguchi; Tsuyoshi Kogawa; Hideo Kasami (VTC Spring, 2013)

Correction to "A 2 Gb/s Throughput CMOS Transceiver Chipset With In-Package Antenna for 60 GHz Short-Range Wireless Communication". - Toshiya Mitomo; Yukako Tsutsumi; Hiroaki Hoshino; Masahiro Hosoya; Tong Wang 018; Yuta Tsubouchi; Ryoichi Tachibana; Akihide Sai; Yuka Kobayashi; Daisuke Kurose; Tomohiko Ito; Koichiro Ban; et al. (IEEE J. Solid State Circuits, 2013)

20.4 A fully integrated single-chip 60GHz CMOS transceiver with scalable power consumption for proximity wireless communication. - Shigehito Saigusa; Toshiya Mitomo; Hidenori Okuni; Masahiro Hosoya; Akihide Sai; Shusuke Kawai; Tong Wang 018; Masanori Furuta; Kei Shiraishi; Koichiro Ban; Seiichiro Horikawa; Tomoya Tandai; et al. (ISSCC, 2014)

A 12.4TOPS/W, 20% Less Gate Count Bidirectional Phase Domain MAC Circuit for DNN Inference Applications. - Yosuke Toyama; Kentaro Yoshioka; Koichiro Ban; Akihide Sai; Kohei Onizuka (A-SSCC, 2018)

An 802.11ax 4×4 spectrum-efficient WLAN AP transceiver SoC supporting 1024QAM with frequency-dependent IQ calibration and integrated interference analyzer. - Shusuke Kawai; Hiromitsu Aoyama; Rui Ito; Yutaka Shimizu; Mitsuyuki Ashida; Asuka Maki; Tomohiko Takeuchi; Hiroyuki Kobayashi; Go Urakawa; Hiroaki Hoshino; Shigehito Saigusa; Kazushi Koyama; et al. (ISSCC, 2018)

PhaseMAC: A 14 TOPS/W 8bit GRO Based Phase Domain MAC Circuit for in-Sensor-Computed Deep Learning Accelerators. - Kentaro Yoshioka; Yosuke Toyama; Koichiro Ban; Daisuke Yashima; Shigeru Maya; Akihide Sai; Kohei Onizuka (VLSI Circuits, 2018)

An 802.11ax 4 × 4 High-Efficiency WLAN AP Transceiver SoC Supporting 1024-QAM With Frequency-Dependent IQ Calibration and Integrated Interference Analyzer. - Shusuke Kawai; Rui Ito; Kengo Nakata; Yutaka Shimizu; Motoki Nagata; Tomohiko Takeuchi; Hiroyuki Kobayashi; Katsuyuki Ikeuchi; Takayuki Kato; Yosuke Hagiwara; Yuki Fujimura; Kentaro Yoshioka; et al. (IEEE J. Solid State Circuits, 2018)

An 8 Bit 12.4 TOPS/W Phase-Domain MAC Circuit for Energy-Constrained Deep Learning Accelerators. - Yosuke Toyama; Kentaro Yoshioka; Koichiro Ban; Shigeru Maya; Akihide Sai; Kohei Onizuka (IEEE J. Solid State Circuits, 2019)

An Efficient Implementation of FPGA-based Object Detection Using Multi-scale Attention. - Masanori Furuta; Koichiro Ban; Daisuke Kobayashi; Tomoyuki Shibata (MWSCAS, 2021)