A 14-ns 14-Mb CMOS DRAM with 300-mW active power. - Toshiaki Kirihata; Sang H. Dhong; Koji Kitamura; Toshio Sunaga; Yasunao Katayama; Roy E. Scheuerlein; Akashi Satoh; Yoshinori Sakaue; Kentaroh Tobimatsu; Koji Hosokawa; Takaki Saitoh; Takefumi Yoshikawa; et al. (IEEE J. Solid State Circuits, 1992)

A 64Kb - 32 DRAM for graphics applications. - Toshio Sunaga; Koji Hosokawa; Sang H. Dhong; Koji Kitamura (IBM J. Res. Dev., 1995)

An eight-bit prefetch circuit for high-bandwidth DRAM's. - Toshio Sunaga; Koji Hosokawa; Yutaka Nakamura; Manabu Ichinose; Yasuyuki Igarashi (IEEE J. Solid State Circuits, 1997)