A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines. - Yoshifumi Ikenaga; Masahiro Nomura; Shuji Suenaga; Hideo Sonohara; Yoshitaka Horikoshi; Toshiyuki Saito; Yukio Ohdaira; Yoichiro Nishio; Tomohiro Iwashita; Miyuki Satou; Koji Nishida; Koichi Nose; et al. (IEEE J. Solid State Circuits, 2012)

Augmented Reality-Based System for Skill Transfer of Workpiece Fixturing in Turning Operations. - Koji Nishida; Masatoshi Itoh; Keiichi Nakamoto (Int. J. Autom. Technol., 2023)