Method of diagnosing single bridging faults in combinational circuit. - Teruhiko Yamada; Koji Yamazaki (Syst. Comput. Jpn., 1991)

A simple technique for locating gate-level faults in combinational circuits. - Teruhiko Yamada; Koji Yamazaki; Edward J. McCluskey (Asian Test Symposium, 1995)

A Single Bridging Fault Location Technique for CMOS Combinational Circuits. - Koji Yamazaki; Teruhiko Yamada (IEICE Trans. Inf. Syst., 1995)

An approach to diagnose logical faults in partially observable sequential circuits. - Koji Yamazaki; Teruhiko Yamada (Asian Test Symposium, 1997)

Identification of Redundant Crosspoint Faults in Sequential PLAs with Fault-Free Hardware Reset. - Teruhiko Yamada; Toshinori Kotake; Hiroshi Takahashi; Koji Yamazaki (Asian Test Symposium, 1999)

Fanout-based fault diagnosis for open faults on pass/fail information. - Koji Yamazaki; Yuzo Takamatsu (ATS, 2006)

Effective Post-BIST Fault Diagnosis for Multiple Faults. - Hiroshi Takahashi; Shuhei Kadoyama; Yoshinobu Higami; Yuzo Takamatsu; Koji Yamazaki; Takashi Aikyo; Yasuo Sato (DFT, 2006)

Clues for Modeling and Diagnosing Open Faults with Considering Adjacent Lines. - Hiroshi Takahashi; Yoshinobu Higami; Shuhei Kadoyama; Takashi Aikyo; Yuzo Takamatsu; Koji Yamazaki; Toshiyuki Tsutsumi; Hiroyuki Yotsuyanagi; Masaki Hashizume (ATS, 2007)

Post-BIST Fault Diagnosis for Multiple Faults. - Hiroshi Takahashi; Yoshinobu Higami; Shuhei Kadoyama; Yuzo Takamatsu; Koji Yamazaki; Takashi Aikyo; Yasuo Sato (IEICE Trans. Inf. Syst., 2008)

Fault Diagnosis on Multiple Fault Models by Using Pass/Fail Information. - Yuzo Takamatsu; Hiroshi Takahashi; Yoshinobu Higami; Takashi Aikyo; Koji Yamazaki (IEICE Trans. Inf. Syst., 2008)

A Method of Locating Open Faults on Incompletely Identified Pass/Fail Information. - Koji Yamazaki; Yuzo Takamatsu (IEICE Trans. Inf. Syst., 2008)

New Class of Tests for Open Faults with Considering Adjacent Lines. - Hiroshi Takahashi; Yoshinobu Higami; Yuzo Takamatsu; Koji Yamazaki; Toshiyuki Tsutsumi; Hiroyuki Yotsuyanagi; Masaki Hashizume (Asian Test Symposium, 2009)

A Novel Approach for Improving the Quality of Open Fault Diagnosis. - Koji Yamazaki; Toshiyuki Tsutsumi; Hiroshi Takahashi; Yoshinobu Higami; Takashi Aikyo; Yuzo Takamatsu; Hiroyuki Yotsuyanagi; Masaki Hashizume (VLSI Design, 2009)

Fault Effect of Open Faults Considering Adjacent Signal Lines in a 90 nm IC. - Hiroyuki Yotsuyanagi; Masaki Hashizume; Toshiyuki Tsutsumi; Koji Yamazaki; Takashi Aikyo; Yoshinobu Higami; Hiroshi Takahashi; Yuzo Takamatsu (VLSI Design, 2009)

Evaluation of transition untestable faults using a multi-cycle capture test generation method. - Masayoshi Yoshimura; Hiroshi Ogawa; Toshinori Hosokawa; Koji Yamazaki (DDECS, 2010)

A heuristic algorithm for reducing system-level test vectors with high branch coverage. - Koji Yamazaki; Yusuke Sekihara; Takashi Aoki; Eiichi Hosoya; Akira Onozawa (ISCAS, 2011)

Diagnosing Resistive Open Faults Using Small Delay Fault Simulation. - Koji Yamazaki; Toshiyuki Tsutsumi; Hiroshi Takahashi; Yoshinobu Higami; Hironobu Yotsuyanagi; Masaki Hashizume; Kewal K. Saluja (Asian Test Symposium, 2013)

A reliable procedure in a new power management technique for a 200-Gbps packet forwarding LSI. - Sadayuki Yasuda; Shoko Ohteru; Yasuyuki Itoh; Koji Yamazaki; Yusuke Sekihara; Takashi Aoki; Masami Urano; Tsugumichi Shibata (IEICE Electron. Express, 2013)

Development of a single cell electroporation method using a scanning ion conductance microscope with a theta type probe pipette. - Satoshi Sakurai; Koji Yamazaki; Tatsuo Ushiki; Futoshi Iwata (MHS, 2014)

Accelerating SDN/NFV with Transparent Offloading Architecture. - Koji Yamazaki; Takeshi Osaka; Sadayuki Yasuda; Shoko Ohteru; Akihiko Miyazaki (ONS, 2014)

Lagopus FPGA - A reprogrammable data plane for high-performance software SDN switches. - Koji Yamazaki; Yoshihiro Nakajima; Takahiro Hatano; Akihiko Miyazaki (Hot Chips Symposium, 2015)

A Diagnostic Fault Simulation Method for a Single Universal Logical Fault Model. - Toshinori Hosokawa; Hideyuki Takano; Hiroshi Yamazaki; Koji Yamazaki (PRDC, 2017)

Flow Cache Cleansing with FPGA Hash Pipe for Highly Stabilized Software Data Plane. - Koji Yamazaki; Yuta Ukon; Shuhei Yoshida; Saki Hatta; Yusuke Sekihara; Shoko Ohteru; Tomoaki Kawamura; Takahiro Hatano; Koyo Nitta; Akihiko Miyazaki (HPSR, 2018)

Video Service Function Chaining with a Real-time Packet Reordering Circuit. - Yuta Ukon; Koji Yamazaki; Koyo Nitta (ISCAS, 2018)

Real-Time Image Processing Based on Service Function Chaining Using CPU-FPGA Architecture. - Yuta Ukon; Koji Yamazaki; Koyo Nitta (IEICE Trans. Commun., 2020)

Attempts Toward Behavior Recognition of the Asian Black Bears Using an Accelerometer. - Kaori Fujinami; Tomoko Naganuma; Yushin Shinoda; Koji Yamazaki; Shinsuke Koike (ABC, 2021)

An Estimation Method of Defect Types Using Artificial Neural Networks and Fault Detection Information. - Natsuki Ota; Toshinori Hosokawa; Koji Yamazaki; Yukari Yamauchi; Masayuki Arai (DFT, 2023)

High-definition technology of AI inference scheme for object detection on edge/terminal. - Hiroyuki Uzawa; Shuhei Yoshida; Yukou Iinuma; Saki Hatta; Daisuke Kobayashi; Yuya Omori; Yusuke Horishita; Ken Nakamura; Shuichi Takada; Hassan Toorabally; Koyo Nitta; Koji Yamazaki; et al. (IEICE Electron. Express, 2023)