Basic principles and new solutions for analog sampled-data image rejection mixers. - Kong-Pang Pun; José E. Franca; Carlos Azeredo Leme (ICECS, 1998)

Poly-phase switched-capacitor IIR Hilbert transformers. - Kong-Pang Pun; José E. Franca; Carlos Azeredo Leme (ICECS, 1999)

Wideband digital correction of I and Q mismatch in quadrature radio receivers. - Kong-Pang Pun; José E. Franca; Carlos Azeredo Leme (ISCAS, 2000)

A quadrature sampling scheme with improved image rejection for complex-IF receivers. - Kong-Pang Pun; José E. Franca; Carlos Azeredo Leme (ISCAS (1), 2001)

A 900 MHz 1.2 V CMOS mixer with high linearity. - Wang-Chi Cheng; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (APCCAS (1), 2002)

A Totally Self-Checking Dynamic Asynchronous Datapath. - Jing-Ling Yang; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (Asian Test Symposium, 2002)

A 1.2 V 900 MHz CMOS mixer. - Wang-Chi Cheng; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (ISCAS (5), 2002)

A CMOS current feedback operational amplifier with active current mode compensation. - Kin-Pui Ho; Cheong-Fat Chan; Chiu-sing Choy; Kong-Pang Pun (ISCAS (1), 2002)

A quadrature IF mixer with high image rejection for continuous-time complex Sigma-Delta modulators. - Kong-Pang Pun; Chiu-sing Choy; Cheong-Fat Chan; José E. Franca (ISCAS (4), 2002)

A contactless smartcard designed with asynchronous circuit technique. - Pui-Lam Siu; Chiu-Sing Choy; Chi Fat Chan; Kong-Pang Pun (ESSCIRC, 2003)

An FPGA-based re-configurable 24-bit 96kHz sigma-delta audio DAC. - Ray C. C. Cheung; Kong-Pang Pun; Steve C. L. Yuen; Kuen Hung Tsoi; Philip Heng Wai Leong (FPT, 2003)

An HMM-based speech recognition IC. - Wei Han; Kwok-Wai Hon; Cheong-Fat Chan; Tan Lee 001; Chiu-sing Choy; Kong-Pang Pun; Pak-Chung Ching (ISCAS (2), 2003)

A low power asynchronous GF(2173) ALU for elliptic curve crypto-processor. - Pak-Keung Leung; Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (ISCAS (5), 2003)

Clock recovery circuit with adiabatic technology (quasi-static CMOS logic). - W. K. Yeung; Cheong-Fat Chan; Chiu-sing Choy; Kong-Pang Pun (ISCAS (2), 2003)

Design for Self-Checking and Self-Timed Datapath. - Jing-Ling Yang; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (VTS, 2003)

Reversed nested Miller compensation with voltage buffer and nulling resistor. - Kin-Pui Ho; Cheong-Fat Chan; Chiu-Sing Choy; Kong-Pang Pun (IEEE J. Solid State Circuits, 2003)

Quadrature sampling schemes with improved image rejection. - Kong-Pang Pun; José E. da Franca; Carlos Azeredo Leme; Ricardo Reis 001 (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A low power asynchronous Java processor for contactless smart card. - Chun-Pong Yu; Chiu-sing Choy; Hao Min; Cheong-Fat Chan; Kong-Pang Pun (ASP-DAC, 2004)

Card-Centric Framework - Providing I/O Resources for Smart Cards. - Pak-Kee Chan; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (CARDIS, 2004)

IP Generation for an FPGA-Based Audio DAC Sigma-Delta Converter. - Ralf Ludewig; Oliver Soffke; Peter Zipf; Manfred Glesner; Kong-Pang Pun; Kuen Hung Tsoi; Kin-Hong Lee; Philip Heng Wai Leong (FPL, 2004)

An IF input continuous-time sigma-delta analog-digital converter with high image rejection. - Junhua Shen; Kong-Pang Pun; Chiu-sing Choy; Cheong-Fat Chan (ICECS, 2004)

An asynchronous SOVA decoder for wireless communication application. - Wing-Kin Chan; Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (ISCAS (2), 2004)

An IF-sampling SC complex lowpass Sigma Delta modulator with high image rejection by capacitor sharing. - Wang Tung Cheng; Kong-Pang Pun; Cheong-Fat Chan; Chiu-sing Choy (ISCAS (1), 2004)

Pipelines in Dynamic Dual-Rail Circuits. - Jing-Ling Yang; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (PATMOS, 2004)

A high-efficiency strongly self-checking asynchronous datapath. - Jing-Ling Yang; Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

A low-latency asynchronous shift register. - Ragnarok Pak-Kee Chan; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

An I/Q mismatch-free switched-capacitor complex sigma-delta Modulator. - Kong-Pang Pun; Chiu-sing Choy; Cheong-Fat Chan; José Epifânio da Franca (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

Preparing smartcard for the future: from passive to active. - Pak-Kee Chan; Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (IEEE Trans. Consumer Electron., 2004)

A 75dB image rejection IF-input quadrature sampling SC ΣΔ modulator. - Wang Tung Cheng; Kong-Pang Pun; Chiu-Sing Choy; Cheong-Fat Chan (ESSCIRC, 2005)

A speech recognizer with selectable model parameters. - Wei Han; Cheong-Fat Chan; Chiu-sing Choy; Kong-Pang Pun (ISCAS (6), 2005)

Realization of card-centric framework: a card-centric computer [smart cards]. - Chi-Leung San; Chiu-sing Choy; Pak-Kee Chan; Cheong-Fat Chan; Kong-Pang Pun (ISCAS (5), 2005)

Ramp voltage supply using adiabatic charging principle. - Pui-Tak So; Cheong-Fat Chan; Chiu-sing Choy; Kong-Pang Pun (ISCAS (3), 2005)

A near-infrared heart rate sensor IC with very low cutoff frequency using current steering technique. - Alex K. Y. Wong; Kong-Pang Pun; Yuan-Ting Zhang; Kevin Hung (ISCAS (3), 2005)

Active RC filter with reduced capacitance by current division technique. - Nang-Ching Yeung; Kong-Pang Pun; Oliver Chiu-sing Choy; Cheong-Fat Chan (ISCAS (4), 2005)

A near-infrared heart rate measurement IC with very low cutoff frequency using current steering technique. - Alex K. Y. Wong; Kong-Pang Pun; Yuan-Ting Zhang; Kevin Hung (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Sub-1 V Current Mode CMOS Integrated Receiver Front-end for GPS System. - Wang-Chi Cheng; Cheong-Fat Chan; Kong-Pang Pun; Oliver Chiu-sing Choy (APCCAS, 2006)

0.8 V GPS band CMOS VCO with 29% Tuning Range. - Wang-Chi Cheng; Cheong-Fat Chan; Kong-Pang Pun; Oliver Chiu-sing Choy (APCCAS, 2006)

Adiabatic Smart Card. - King-Keung Mok; Ka-Hung Tsang; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (APCCAS, 2006)

A 6-digit CMOS current-mode analog-to-quaternary converter with RSD error correction algorithm. - Chi-Hong Chan; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (ISCAS, 2006)

An efficient MFCC extraction method in speech recognition. - Wei Han; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (ISCAS, 2006)

A 0.5V fully differential OTA with local common feedback. - Xiao-Yong He; Kong-Pang Pun; Oliver Chiu-sing Choy; Cheong-Fat Chan (ISCAS, 2006)

An optimal normal basis elliptic curve cryptoprocessor for inductive RFID application. - Pak-Keung Leung; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (ISCAS, 2006)

A fully differential low noise amplifier with real-time channel hopping for ultra-wideband wireless applications. - Siu-Kei Tang; Kong-Pang Pun; Oliver Chiu-sing Choy; Cheong-Fat Chan (ISCAS, 2006)

An ECG measurement IC using driven-right-leg circuit. - Alex K. Y. Wong; Kong-Pang Pun; Yuan-Ting Zhang; Oliver Chiu-sing Choy (ISCAS, 2006)

Power-efficient VLSI implementation of bitstream parsing in H.264/AVC decoder. - Ke Xu 014; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (ISCAS, 2006)

A 0.5V 74dB SNDR 25kHz CT ΔΣ Modulator with Return-to-Open DAC. - Kong-Pang Pun; Shouri Chatterjee; Peter R. Kinget (ISSCC, 2006)

A 75-dB image rejection IF-input quadrature-sampling SC ΣΔ Modulator. - Kong-Pang Pun; Wang Tung Cheng; Chiu-Sing Choy; Cheong-Fat Chan (IEEE J. Solid State Circuits, 2006)

Analog placement with common centroid constraints. - Qiang Ma 002; Evangeline F. Y. Young; Kong-Pang Pun (ICCAD, 2007)

A DEM Scheme for I/Q Mismatch Compensation in Multi-Bit CT Delta Sigma Modulator. - Chi-Tung Ko; Kong-Pang Pun (ISCAS, 2007)

Priority-Based Heading One Detector in H.264/AVC Decoding. - Ke Xu 014; Oliver Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (EURASIP J. Embed. Syst., 2007)

A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC. - Kong-Pang Pun; Shouri Chatterjee; Peter R. Kinget (IEEE J. Solid State Circuits, 2007)

Author's Response. - Kong-Pang Pun; Shouri Chatterjee; Peter R. Kinget (IEEE J. Solid State Circuits, 2007)

Correction to "A 0.5-V 74-dB SNDR 25-kHz Continuous-Time Delta-Sigma Modulator With a Return-to-Open DAC". - Kong-Pang Pun; Shouri Chatterjee; Peter R. Kinget (IEEE J. Solid State Circuits, 2007)

Power-Efficient VLSI Realization of a Complex FSM for H.264/AVC Bitstream Parsing. - Ke Xu 014; Chiu-sing Choy; Cheong-Fat Chan; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities. - Wei Han; Kwok-Wai Hon; Cheong-Fat Chan; Oliver Chiu-sing Choy; Kong-Pang Pun (J. VLSI Signal Process., 2007)

Enhanced channel selection using digital low-IF in Weaver receiver architecture. - Misteltein Pak-Kee Chan; Oliver Chiu-sing Choy; Kong-Pang Pun; Cheong-Fat Chan; Alex Ka Nang Leung (APCCAS, 2008)

Design of passive UHF RFID tag in 130nm CMOS technology. - Yang Hong; Chi Fat Chan; Jianping Guo; Yuen Sum Ng; Weiwei Shi 001; Lincoln Lai Kan Leung; Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun (APCCAS, 2008)

A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection. - Alex K. Y. Wong; Kong-Pang Pun; Yuan-Ting Zhang; Ka Nang Leung (IEEE Trans. Biomed. Circuits Syst., 2008)

A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. - Siu-Kei Tang; Kong-Pang Pun; Oliver Chiu-sing Choy; Cheong-Fat Chan; Ka Nang Leung (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

A comparison of via-programmable gate array logic cell circuits. - Thomas C. P. Chau; Philip Heng Wai Leong; Sam M. H. Ho; Brian P. W. Chan; Steve C. L. Yuen; Kong-Pang Pun; Oliver C. S. Choy; Xinan Wang (FPGA, 2009)

A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. - Chi Fat Chan; Weiwei Shi 001; Kong-Pang Pun; Lincoln Lai Kan Leung; Ka Nang Leung; Oliver Chiu-sing Choy (ISCAS, 2009)

A Novel Mismatch Cancellation and I/Q Channel Multiplexing Scheme for Quadrature Bandpass DeltaSigma Modulators. - Bing Li; Cheong-Fat Chan; Kong-Pang Pun; Oliver Chiu-sing Choy (ISCAS, 2009)

Special Issue on Circuits and Systems Solutions for Nanoscale CMOS Design Challenges. - Lucien J. Breems; Peter R. Kinget; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

A 0.5-V Wideband Amplifier for a 1-MHz CT Complex Delta-Sigma Modulator. - Xiao-Yong He; Kong-Pang Pun; Peter R. Kinget (IEEE Trans. Circuits Syst. II Express Briefs, 2009)

Rapid prototyping on a structured ASIC fabric. - Steve C. L. Yuen; Yanqing Ai; Brian P. W. Chan; Thomas C. P. Chau; Sam M. H. Ho; Oscar K. L. Lau; Kong-Pang Pun; Philip Heng Wai Leong; Oliver C. S. Choy (ASP-DAC, 2010)

Design of a single layer programmable Structured ASIC library. - Thomas C. P. Chau; David W. L. Wu; Yanqing Ai; Brian P. W. Chan; Sam M. H. Ho; Oscar K. L. Lau; Steve C. L. Yuen; Kong-Pang Pun; Oliver C. S. Choy; Philip Heng Wai Leong (DDECS, 2010)

Structured ASIC: Methodology and comparison. - Sam M. H. Ho; Steve C. L. Yuen; Hiu Ching Poon; Thomas C. P. Chau; Yanqing Ai; Philip Heng Wai Leong; Oliver C. S. Choy; Kong-Pang Pun (FPT, 2010)

Practical placement and routing techniques for analog circuit designs. - Linfu Xiao; Evangeline F. Y. Young; Xiao-Yong He; Kong-Pang Pun (ICCAD, 2010)

RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. - Ka Nang Leung; Chiu-sing Choy; Kong-Pang Pun; Lincoln Lai Kan Leung; Jianping Guo; Yuen Sum Ng; Chi Fat Chan; Weiwei Shi 001; Yang Hong; Marco Ho; Ki-Leung Mak; Yanqing Ai (J. Low Power Electron., 2010)

A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. - Chi Fat Chan; Kong-Pang Pun; Ka Nang Leung; Jianping Guo; Lincoln Lai Kan Leung; Oliver Chiu-sing Choy (IEEE J. Solid State Circuits, 2010)

A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device. - Alex K. Y. Wong; Ka Nang Leung; Kong-Pang Pun; Yuan-Ting Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2010)

A Novel Switched-Current Successive Approximation ADC. - Xian Tang; Kong-Pang Pun (J. Circuits Syst. Comput., 2011)

A chopper-stabilized high-pass Delta-Sigma Modulator with reduced chopper charge injection. - Yin-Sheng Zhao; Siu-Kei Tang; Chi-Tung Ko; Kong-Pang Pun (Microelectron. J., 2011)

Analysis and Design of a 14-bit SAR ADC using self-calibration DAC. - Lei Sun; Kong-Pang Pun; Alex K. Y. Wong (ISCAS, 2012)

Novel overshoot cancellation in comparator-based pipelined ADC. - Xian Tang; Kong-Pang Pun (ISCAS, 2012)

Low-offset comparator using capacitive self-calibration. - Lei Sun; Kong-Pang Pun (ISOCC, 2012)

A charge-pump and comparator based power-efficient pipelined ADC technique. - Xian Tang; Chi-Tung Ko; Kong-Pang Pun (Microelectron. J., 2012)

A continuous-time cascaded delta-sigma modulator with PMW-based automatic RC time constant tuning and correlated double sampling. - Bing Li; Kong-Pang Pun (Microelectron. J., 2013)

Unit capacitor array based SAR ADC. - Kong-Pang Pun; Lei Sun; Bing Li (Microelectron. Reliab., 2013)

Architecture and Design Flow for a Highly Efficient Structured ASIC. - S. Man Ho Ho; Yanqing Ai; Thomas Chun-Pong Chau; Steve C. L. Yuen; Oliver Chiu-sing Choy; Philip Heng Wai Leong; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2013)

Simplifying HOG arithmetic for speedy hardware realization. - Jianfeng Wang; Chiu-sing Choy; Tak Lon Chao; Ko-Chun Kit; Kong-Pang Pun; Wanli Ouyang; Xiao-Gang Wang 001 (APCCAS, 2014)

Design considerations of calibration DAC in self-calibrated SAR A/D converters. - Lei Sun; Kong-Pang Pun (Microelectron. J., 2014)

A High Image-Rejection SC Quadrature Bandpass DSM for Low-IF Receivers. - Bing Li; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

A High-Linearity Capacitance-to-Digital Converter Suppressing Charge Errors From Bottom-Plate Switches. - Bing Li; Lei Sun; Chi-Tung Ko; Alex Kak-Yeung Wong; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Optimizing the Stage Resolution in Pipelined SAR ADCs for High-Speed High-Resolution Applications. - Lei Sun; Chi-Tung Ko; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Guest Editorial: Next-Generation Delta-Sigma Converters. - José M. de la Rosa 001; Richard Schreier; Kong-Pang Pun; Shanthi Pavan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

Next-Generation Delta-Sigma Converters: Trends and Perspectives. - José M. de la Rosa 001; Richard Schreier; Kong-Pang Pun; Shanthi Pavan (IEEE J. Emerg. Sel. Topics Circuits Syst., 2015)

A 5-ps Vernier sub-ranging time-to-digital converter with DNL calibration. - Chi-Tung Ko; Kong-Pang Pun; Andreas Gothenberg (Microelectron. J., 2015)

A Charge Recycling SAR ADC With a LSB-Down Switching Scheme. - Lei Sun; Bing Li; Alex K. Y. Wong; Wai Tung Ng; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

A Resistor-Based Sub-1-V CMOS Smart Temperature Sensor for VLSI Thermal Management. - Xian Tang; Wai Tung Ng; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2015)

A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End. - Hao Wang 030; Xian Tang; Chiu-sing Choy; Ka Nang Leung; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2015)

Gm-cell nonlinearity compensation technique using single-bit quantiser and FIR DAC in Gm-C based delta-sigma modulators. - Debajit Basak; Kong-Pang Pun (ISCAS, 2016)

A 10-bit 2 MS/s SAR ADC using reverse VCM-based switching scheme. - Zhongyi Fu; Xian Tang; Daxiang Li 001; Jiangpeng Wang; Debajit Basak; Kong-Pang Pun (ISCAS, 2016)

Continuous-time delta-sigma modulator with an upfront passive-RC low-pass network. - Daxiang Li 001; Yang Zhang 034; Debajit Basak; Kong-Pang Pun (ISOCC, 2017)

An On-Chip Static and Dynamic DAC Error Correction Technique for High Speed Multibit Delta-Sigma Modulators. - Debajit Basak; Sarthak Kalani; Peter R. Kinget; Kong-Pang Pun (ISCAS, 2018)

Power-Efficient Active-RC CT DSM with a Lowpass Capacitor at the Virtual Ground Node of the First Integrator. - Yang Zhang 034; Daxiang Li 001; Kong-Pang Pun (ISCAS, 2018)

A Self-Clocked Resistive CMOS Smart Temperature Sensor for Wireless Sensor Networks. - Xian Tang; Kong-Pang Pun (J. Circuits Syst. Comput., 2018)

A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement. - Debajit Basak; Daxiang Li 001; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Improving Power Efficiency for Active-RC Delta-Sigma Modulators Using a Passive-RC Low-Pass Filter in the Feedback. - Daxiang Li 001; Debajit Basak; Yang Zhang 034; Zhongyi Fu; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

An SAR ADC Switching Scheme With MSB Prediction for a Wide Input Range and Reduced Reference Voltage. - Zhongyi Fu; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2018)

An Automatic On-Chip Calibration Technique for Static and Dynamic DAC Error Correction in High-Speed Continuous-Time Delta-Sigma Modulators. - Debajit Basak; Sarthak Kalani; Yang Zhang 034; Kong-Pang Pun (IEEE Access, 2019)

A 0.4-V 0.2 pJ/step 90-dB SNDR 20-kHz CT delta-sigma modulator using class-AB amplifier with a novel local common-mode feedback. - Yan Chen; Xu Wang; Yang Zhang 034; Kong-Pang Pun (IEICE Electron. Express, 2019)

A Highly Linear Multi-Level SC DAC in a Power-Efficient Gm-C Continuous-Time Delta-Sigma Modulator. - Yang Zhang 034; Debajit Basak; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

An Extremely Linear Multi-Level DAC for Continuous-Time Delta-Sigma Modulators. - Yang Zhang 034; Xiao-Yong He; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

Power-Efficient Gm-C DSMs With High Immunity to Aliasing, Clock Jitter, and ISI. - Yang Zhang 034; Debajit Basak; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2019)

A Power-Efficient 10-MHz Bandwidth Active-RC CTDSM with a Charge-Recycled Highly-Linear 5-Level SC DAC. - He Tong Wang; Mao Ye 007; Yang Zhang 034; Kong-Pang Pun (ISCAS, 2020)

A 0.032-mm2 43.3-fJ/Step 100-200-MHz IF 2-MHz Bandwidth Bandpass DSM Based on Passive N-Path Filters. - Yang Zhang 034; Peter R. Kinget; Kong-Pang Pun (IEEE J. Solid State Circuits, 2020)

A 9.6 nW, 8-Bit, 100 S/s Envelope-to-Digital Converter for Respiratory Monitoring. - Erjia Shi; Daniel de Godoy; Peter R. Kinget; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Current-Switching Technique for Intra-Body Communication With Miniaturized Electrodes. - Weihao Wang; Kong-Pang Pun; Bo Zhao 003 (IEEE Trans. Biomed. Circuits Syst., 2021)

A 270 nW Switched-Capacitor Acoustic Feature Extractor for Always-On Voice Activity Detection. - Erjia Shi; Xian Tang; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 0.59-mW 78.7-dB SNDR 2-MHz Bandwidth Active-RC Delta-Sigma Modulator With Relaxed and Reduced Amplifiers. - Hetong Wang; Debajit Basak; Yang Zhang 034; Kong-Pang Pun (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

A 10-MHz 85.1-dB SFDR 1.1-mW continuous-time Delta-sigma modulator employing calibration-free SC DAC and passive front-end low-pass filter. - Wei Jin; Kong-Pang Pun (Microelectron. J., 2023)

A 13-Level SC DAC Achieving High Linearity With a Simple DEM for Wideband CT DSMs. - Hetong Wang; Zhongxu Zheng; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Low-Power Keyword Spotting System With High-Order Passive Switched-Capacitor Bandpass Filters for Analog-MFCC Feature Extraction. - Shiying Zhang; Fukun Su; Yi Wang; Songping Mai; Kong-Pang Pun; Xian Tang (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Lightweight, error-tolerant edge detection using memristor-enabled stochastic logics. - Lekai Song; Pengyu Liu; Jingfang Pei; Yang Liu; Songwei Liu; Shengbo Wang; Leonard W. T. Ng; Tawfique Hasan; Kong-Pang Pun; Shuo Gao 001; Guohua Hu (CoRR, 2024)

True random number generation using metastable 1T' molybdenum ditelluride. - Yang Liu; Pengyu Liu; Yingyi Wen; Zihan Liang; Songwei Liu; Lekai Song; Jingfang Pei; Xiaoyue Fan; Teng Ma; Gang Wang; Shuo Gao 001; Kong-Pang Pun; et al. (CoRR, 2024)

Timely reliable Bayesian decision-making enabled using memristors. - Lekai Song; Pengyu Liu; Yang Liu; Jingfang Pei; Wenyu Cui; Songwei Liu; Yingyi Wen; Teng Ma; Kong-Pang Pun; Guohua Hu (CoRR, 2024)

Stability analysis and optimization of CT DSMs with an NS SAR quantizer by a redistributed noise shaping technique. - Weihao Wang; Kong-Pang Pun (Microelectron. J., 2024)

A 125-600-MHz IF 75-dB DR Partially Time-Interleaved Bandpass DSM Based on Passive N-Path Filters. - Wei Jin; Kong-Pang Pun (IEEE J. Solid State Circuits, 2024)

A 65.7-dB SNDR 2-MHz bandwidth low-power bandpass DSM based on passive N-path filters with enhanced out-of-band rejection. - Lijuan Yi; Wenxin He; Xian Tang; Yang Zhang 034; Kong-Pang Pun (Microelectron. J., 2025)

An Area/Power-Efficient Noise-Shaping SAR ADC for Implantable Biosensor Applications Featuring a Unique Auxiliary Feedback Loop. - Weihao Wang; Kong-Pang Pun (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A 2-MHz BW 64.5-dB SNDR 0.45-1.05 GHz Direct IF/RF Digitization Subsampling Bandpass DSM Utilizing a Capacitive-Stacking N-Path Filter. - Xiao Wang; Runkun Li; Xin Sun; Kong-Pang Pun (IEEE Trans. Circuits Syst. II Express Briefs, 2025)