D/A conversion: amplitude and time error mapping optimization. - Konstantinos Doris; Chieh Lin; Domine Leenaerts; Arthur H. M. van Roermund (ICECS, 2001)

A general analysis on the timing jitter in D/A converters. - Konstantinos Doris; Arthur H. M. van Roermund; Domine Leenaerts (ISCAS (1), 2002)

Mismatch-based timing errors in current steering DACs. - Konstantinos Doris; Arthur H. M. van Roermund; Domine Leenaerts (ISCAS (1), 2003)

Smart AD and DA converters. - Arthur H. M. van Roermund; Hans Hegt; Pieter Harpe; Georgi I. Radulov; Athon Zanikopoulos; Konstantinos Doris; Patrick J. Quinn (ISCAS (4), 2005)

Statistical Analysis of Mapping Technique for Timing Error Correction in Current-Steering DACs. - Yongjian Tang; Hans Hegt; Arthur H. M. van Roermund; Konstantinos Doris; Joost Briaire (ISCAS, 2007)

A 480mW 2.6GS/s 10b 65nm CMOS time-interleaved ADC with 48.5dB SNDR up to Nyquist. - Konstantinos Doris; Erwin Janssen; Claudio Nani; Athon Zanikopoulos; Gerard van der Weide (ISSCC, 2011)