On the Design of Configurable Modulo 2n±1 Residue Generators. - Constantinos Efstathiou; Nikolaos Moschopoulos; Kostas Tsoumanis; Kiamal Z. Pekmestzi (DSD, 2012)

Efficient modulo 2n+1 multiplication for the idea block cipher. - Kiamal Z. Pekmestzi; Constantinos Efstathiou; Nikolaos Moschopoulos; Kostas Tsoumanis (ACM Great Lakes Symposium on VLSI, 2013)

A radiation tolerant and self-repair memory cell. - Nikolaos Eftaxiopoulos-Sarris; Georgios Zervakis 001; Kostas Tsoumanis; Kiamal Z. Pekmestzi (IOLTS, 2013)

On the design of modulo 2n±1 residue generators. - Kostas Tsoumanis; Constantinos Efstathiou; Nikolaos Moschopoulos; Kiamal Z. Pekmestzi (VLSI-SoC, 2013)

A segmentation-based BISR scheme. - Georgios Zervakis 001; Nikolaos Eftaxiopoulos-Sarris; Kostas Tsoumanis; Nicholas Axelos; Kiamal Z. Pekmestzi (ASP-DAC, 2014)

On the design of efficient modulo 2n+1 multiply-add-add units. - Constantinos Efstathiou; Kostas Tsoumanis; Kiamal Z. Pekmestzi; Ioannis Voyiatzis (DTIS, 2014)

Fused modulo 2n - 1 add-multiply unit. - Kostas Tsoumanis; Kiamal Z. Pekmestzi; Constantinos Efstathiou (ICECS, 2014)

An independent dual gate SOI FinFET soft-error resilient memory cell. - Nikolaos Eftaxiopoulos-Sarris; Nicholas Axelos; Georgios Zervakis 001; Kostas Tsoumanis; Kiamal Z. Pekmestzi (IDT, 2014)

Modulo 2n+1 addition and multiplication for redundant operands. - Kostas Tsoumanis; Constantinos Efstathiou; Kiamal Z. Pekmestzi (IDT, 2014)

A high radix montgomery multiplier with concurrent error detection. - Georgios Zervakis 001; Nikolaos Eftaxiopoulos-Sarris; Kostas Tsoumanis; Nicholas Axelos; Kiamal Z. Pekmestzi (IDT, 2014)

FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs. - Nicholas Axelos; Nikolaos Eftaxiopoulos-Sarris; Georgios Zervakis 001; Kostas Tsoumanis; Kiamal Z. Pekmestzi (IOLTS, 2014)

An Optimized Modified Booth Recoder for Efficient Design of the Add-Multiply Operator. - Kostas Tsoumanis; Sotirios Xydis; Constantinos Efstathiou; Nikolaos Moschopoulos; Kiamal Z. Pekmestzi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Approximate Multiplier Architectures Through Partial Product Perforation: Power-Area Tradeoffs Analysis. - Georgios Zervakis 001; Kostas Tsoumanis; Sotirios Xydis; Nicholas Axelos; Kiamal Z. Pekmestzi (ACM Great Lakes Symposium on VLSI, 2015)

Hybrid approximate multiplier architectures for improved power-accuracy trade-offs. - Georgios Zervakis 001; Sotirios Xydis; Kostas Tsoumanis; Dimitrios Soudris; Kiamal Z. Pekmestzi (ISLPED, 2015)

Modulo 2n ± 1 Fused Add-Multiply Units. - Constantinos Efstathiou; Kostas Tsoumanis; Kiamal Z. Pekmestzi; Ioannis Voyiatzis (ISVLSI, 2015)

Delta DICE: A Double Node Upset resilient latch. - Nikolaos Eftaxiopoulos; Nicholas Axelos; Georgios Zervakis 001; Kostas Tsoumanis; Kiamal Z. Pekmestzi (MWSCAS, 2015)

Fused modulo 2n + 1 add-multiply unit for weighted operands. - Kiamal Z. Pekmestzi; Kostas Tsoumanis; Constantinos Efstathiou (DTIS, 2016)

Pre-Encoded Multipliers Based on Non-Redundant Radix-4 Signed-Digit Encoding. - Kostas Tsoumanis; Nicholas Axelos; Nikolaos Moschopoulos; Georgios Zervakis 001; Kiamal Z. Pekmestzi (IEEE Trans. Computers, 2016)

Flexible DSP Accelerator Architecture Exploiting Carry-Save Arithmetic. - Kostas Tsoumanis; Sotirios Xydis; Georgios Zervakis 001; Kiamal Z. Pekmestzi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Design-Efficient Approximate Multiplication Circuits Through Partial Product Perforation. - Georgios Zervakis 001; Kostas Tsoumanis; Sotirios Xydis; Dimitrios Soudris; Kiamal Z. Pekmestzi (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Τεχνικές βελτιστοποίησης σύνθετων αριθμητικών συστημάτων - Kostas Tsoumanis (2016)