A 333MHz random cycle DRAM using the floating body cell. - Kosuke Hatsuda; Katsuyuki Fujita; Takashi Ohsawa (CICC, 2005)

Design of a 128-mb SOI DRAM using the floating body cell (FBC). - Takashi Ohsawa; Katsuyuki Fujita; Kosuke Hatsuda; Tomoki Higashi; Tomoaki Shino; Yoshihiro Minami; Hiroomi Nakajima; Mutsuo Morikado; Kazumi Inoh; Takeshi Hamamoto; Shigeyoshi Watanabe; Shuso Fujii; et al. (IEEE J. Solid State Circuits, 2006)

A 1.6GB/s DDR2 128Mb chain FeRAM with scalable octal bitline and sensing schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (ISSCC, 2009)

A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes. - Hidehiro Shiga; Daisaburo Takashima; Shinichiro Shiratake; Katsuhiko Hoya; Tadashi Miyakawa; Ryu Ogiwara; Ryo Fukuda; Ryosuke Takizawa; Kosuke Hatsuda; Fumiyoshi Matsuoka; Yasushi Nagadomi; Daisuke Hashimoto; et al. (IEEE J. Solid State Circuits, 2010)

Generation of Accurate Reference Current for Data Sensing in High-Density Memories by Averaging Multiple Pairs of Dummy Cells. - Takashi Ohsawa; Kosuke Hatsuda; Katsuyuki Fujita; Fumiyoshi Matsuoka; Tomoki Higashi (IEEE J. Solid State Circuits, 2011)

A 128 Mb Chain FeRAM and System Design for HDD Application and Enhanced HDD Performance. - Daisaburo Takashima; Yasushi Nagadomi; Kosuke Hatsuda; Yohji Watanabe; Shuso Fujii (IEEE J. Solid State Circuits, 2011)

A perspective on NVRAM technology for future computing system. - Katsuhiko Hoya; Kosuke Hatsuda; Kenji Tsuchida; Yohji Watanabe; Yusuke Shirota; Tatsunori Kanai (VLSI-DAT, 2019)

30.6 A 64Gb DDR4 STT-MRAM Using a Time-Controlled Discharge-Reading Scheme for a .001681µm 1T-1MTJ Cross-Point Cell. - Kosuke Hatsuda; Katsuhiko Hoya; Ryosuke Takizawa; Fumiyoshi Matsuoka; Takaya Yasuda; Akira Katayama; Tadashi Miyakawa; Kazuyo Senju; Kazuki Okawa; Yuka Furukawa; Yu Shimada; Katsuya Kotake; et al. (ISSCC, 2025)