Hardware implementation of BLTL property checkers for acceleration of statistical model checking. - Kosuke Oshima; Takeshi Matsumoto; Masahiro Fujita (ICCAD, 2013)

A debugging method for gate level circuit designs by introducing programmability. - Kosuke Oshima; Takeshi Matsumoto; Masahiro Fujita (VLSI-SoC, 2013)

Debugging Methods Through Identification of Appropriate Functions for Internal Gates. - Kosuke Oshima; Takeshi Matsumoto; Masahiro Fujita (VLSI-SoC (Selected Papers), 2013)