A VLSI design of an arrayed pipelined Tomlinson-Harashima precoder for MU-MIMO systems. - Kosuke Shimazaki; Shingo Yoshizawa; Yasuyuki Hatakawa; Tomoko Matsumoto; Satoshi Konishi; Yoshikazu Miyanaga (APSIPA, 2013)

A VLSI Design of a Tomlinson-Harashima Precoder for MU-MIMO Systems Using Arrayed Pipelined Processing. - Kosuke Shimazaki; Shingo Yoshizawa; Yasuyuki Hatakawa; Tomoko Matsumoto; Satoshi Konishi; Yoshikazu Miyanaga (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)