A Parallel Architecture for Successive Elimination Block Matching Algorithm. - Kota Naga Srinivasarao Batta; Indrajit Chakrabarti (ICVGIP, 2008)

Hardware Implementation of Compressed Sensing based Low Complex Video Encoder. - Kota Naga Srinivasarao Batta; Indrajit Chakrabarti (CoRR, 2015)

High Speed VLSI Architecture for 3-D Discrete Wavelet Transform. - Kota Naga Srinivasarao Batta; Indrajit Chakrabarti (CoRR, 2015)

High-speed low-power very-large-scale integration architecture for dual-standard deblocking filter. - Kota Naga Srinivasarao Batta; Indrajit Chakrabarti; Mohammad Nawaz Ahmad (IET Circuits Devices Syst., 2015)

Motion Estimation for Video Coding - Efficient Algorithms and Architectures - Indrajit Chakrabarti; Kota Naga Srinivasarao Batta; Sumit Kumar Chatterjee (Springer, 2015)

VLSI Friendly Framework for Scalable Video Coding based on Compressed Sensing. - Kota Naga Srinivasarao Batta; Vinay Chakravarthi Gogineni; Subrahmanyam Mula; Indrajit Chakrabarti (CoRR, 2016)

A novel framework for compressed sensing based scalable video coding. - Kota Naga Srinivasarao Batta; Vinay Chakravarthi Gogineni; Subrahmanyam Mula; Indrajit Chakrabarti (Signal Process. Image Commun., 2017)

VLSI Architecture for Enhanced Approximate Message Passing Algorithm. - Kota Naga Srinivasarao Batta; Indrajit Chakrabarti (IEEE Trans. Circuits Syst. Video Technol., 2020)

Evaluation of 3D-DiamondMesh Homogeneous and Heterogeneous Architectures. - V. Lakshmi Kiranmai; Kota Naga Srinivasarao Batta; Sowjanya Kotte (TENCON, 2023)

Fast Coding Unit Depth Identification Using Texture and Multiple Deep Learning Architectures. - Pattimi Hari; Kota Naga Srinivasarao Batta; Polamarasetty P. Kumar; Ramakrishna S. S. Nuvvula; Baseem Khan; Aanchal Verma; R. K. Saket (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)