Co-designed Capacitive Coupling-Immune Sensing Scheme for Indium-Tin-Oxide (ITO) 2T Gain Cell Operating at Positive Voltage Below 2 V. - Kasidit Toprasertpong; Shuhan Liu; Jian Chen; Sumaiya Wahid; Koustav Jana; Wei-Chen Chen; Shengman Li; Eric Pop; H.-S. Philip Wong (VLSI Technology and Circuits, 2023)

Positive Bias Stress Measurement Guideline and Band Analysis for Evaluating Instability of Oxide Semiconductor Transistors. - Qi Jiang; Koustav Jana; Kasidit Toprasertpong; Shuhan Liu; H.-S. Philip Wong (VLSI Technology and Circuits, 2024)

First Experimental Demonstration of Hybrid Gain Cell Memory with Si PMOS and ITO FET for High-speed On-chip Memory. - Shuhan Liu; Shengjun Qin; Koustav Jana; Jian Chen; Kasidit Toprasertpong; H.-S. Philip Wong (VLSI Technology and Circuits, 2024)

OpenGCRAM: An Open-Source Gain Cell Compiler Enabling Design-Space Exploration for AI Workloads. - Xinxin Wang; Lixian Yan; Shuhan Liu; Luke Upton; Zhuoqi Cai; Yiming Tan; Shengman Li; Koustav Jana; Peijing Li; Jesse Cirimelli-Low; Thierry Tambe; Matthew Guthaus; et al. (CoRR, 2025)