Low Power Reduced Pin Count Test Methodology. - Krishna Chakravadhanula; Nitin Parimi; Brian Foutz; Bing Li; Vivek Chickermane (ATS, 2007)

Test Generation for State Retention Logic. - Krishna Chakravadhanula; Vivek Chickermane; Brion L. Keller; Patrick R. Gallagher Jr.; Steven Gregor (ATS, 2008)

A Power-Aware Test Methodology for Multi-Supply Multi-Voltage Designs. - Vivek Chickermane; Patrick R. Gallagher Jr.; James Sage; Paul Yuan; Krishna Chakravadhanula (ITC, 2008)

Why is Conventional ATPG Not Sufficient for Advanced Low Power Designs?. - Krishna Chakravadhanula; Vivek Chickermane; Brion L. Keller; Patrick R. Gallagher Jr.; Anis Uzzaman (Asian Test Symposium, 2009)

Capture power reduction using clock gating aware test generation. - Krishna Chakravadhanula; Vivek Chickermane; Brion L. Keller; Patrick R. Gallagher Jr.; Prashant Narang (ITC, 2009)

Automating IEEE 1500 Core Test—An EDA Perspective. - Krishna Chakravadhanula; Vivek Chickermane (IEEE Des. Test Comput., 2009)

Low cost at-speed testing using On-Product Clock Generation compatible with test compression. - Brion L. Keller; Krishna Chakravadhanula; Brian Foutz; Vivek Chickermane; R. Malneedi; Thomas J. Snethen; Vikram Iyengar; David E. Lackey; Gary Grise (ITC, 2010)

SmartScan - Hierarchical test compression for pin-limited low power designs. - Krishna Chakravadhanula; Vivek Chickermane; Don Pearl; Akhil Garg 001; R. Khurana; Subhasish Mukherjee; P. Nagaraj (ITC, 2013)

Efficient testing of hierarchical core-based SOCs. - Brion L. Keller; Krishna Chakravadhanula; Brian Foutz; Vivek Chickermane; Akhil Garg 001; Richard Schoonover; James Sage; Don Pearl; Thomas J. Snethen (ITC, 2014)

Tutorial T3A: Testing Low-Power Integrated Circuits: Challenges, Solutions, and Industry Practices. - Srivaths Ravi 001; Vivek Chickermane; Krishna Chakravadhanula (VLSID, 2014)

A Novel Failure Diagnosis Approach for Low Pin Count and Low Power Compression Architectures. - Sameer Chillarige; S. Virdi; Anil Malik; Krishna Chakravadhanula; Vivek Chickermane; Joe Swenton; G. Vandling (NATW, 2015)

Advancing test compression to the physical dimension. - Krishna Chakravadhanula; Vivek Chickermane; Paul Cunningham; Brian Foutz; Dale Meehl; Louis Milano; Christos Papameletis; David Scott; Steev Wilcox (ITC, 2017)

High throughput multiple device diagnosis system. - Sameer Chillarige; Anil Malik; Sharjinder Singh; Joe Swenton; Krishna Chakravadhanula (ITC, 2017)

Improving Diagnosis Resolution and Performance at High Compression Ratios. - Sameer Chillarige; Atul Chhabra; Anil Malik; Bharath Nandakumar; Joe Swenton; Krishna Chakravadhanula (ITC, 2018)

Optimized Physical DFT Synthesis of Unified Compression and LBIST for Automotive Applications. - Christos Papameletis; Vivek Chickermane; Brian Foutz; Sarthak Singhal; Krishna Chakravadhanula (ITC, 2019)

PPA Optimization of Test Points in Automotive Designs. - Brian Foutz; Sarthak Singhal; Prateek Kumar Rai; Krishna Chakravadhanula; Vivek Chickermane; Bharath Nandakumar; Sameer Chillarige; Christos Papameletis; Satish Ravichandran (ITC, 2022)