PACE: a parallel VLSI extractor on the Intel hypercube multiprocessor. - Krishna P. Belkhale; Prithviraj Banerjee (ICCAD, 1988)

Reconfiguration strategies in VLSI processor arrays. - Krishna P. Belkhale; Prith Banerjee (ICCD, 1988)

PACE2: an improved parallel VLSI extractor with parameter extraction. - Krishna P. Belkhale; Prithviraj Banerjee (ICCAD, 1989)

A Parallel Algorithm for Hierarchical Circuit Extraction. - Krishna P. Belkhale; Prithviraj Banerjee (ICCAD, 1990)

An Approximate Algorithm for the Partitionable Independent Task Scheduling Problem. - Krishna P. Belkhale; Prithviraj Banerjee (ICPP (1), 1990)

Geometric Connected Component Labeling on Distributed Memory Multicomputers. - Krishna P. Belkhale; Prithviraj Banerjee (ICPP (3), 1990)

A Scheduling Algorithm for Parallelizable Dependent Tasks. - Krishna P. Belkhale; Prithviraj Banerjee (IPPS, 1991)

Parallel algorithms for VLSI circuit extraction. - Krishna P. Belkhale; Prithviraj Banerjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Parallel algorithms for CAD with applications to circuit extraction - Krishna P. Belkhale (1991)

Reconfiguration Strategies for VLSI Processor Arrays and Trees Using a Modified Diogenes Approach. - Krishna P. Belkhale; Prithviraj Banerjee (IEEE Trans. Computers, 1992)

Parallel Algorithms for Geometric Connected Component Labeling on a Hypercube Multiprocessor. - Krishna P. Belkhale; Prithviraj Banerjee (IEEE Trans. Computers, 1992)

Task scheduling for exploiting parallelism and hierarchy in VLSI CAD algorithms. - Krishna P. Belkhale; Randall J. Brouwer; Prithviraj Banerjee (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1993)

Timing analysis with known false sub graphs. - Krishna P. Belkhale; Alexander J. Suess (ICCAD, 1995)

An Approxmimate Algorithm for Delay-Constraint Technology Mapping. - Sumit Roy 003; Krishna P. Belkhale; Prithviraj Banerjee (DAC, 1999)

Timing model extraction of hierarchical blocks by graph reduction. - Cho W. Moon; Harish Kriplani; Krishna P. Belkhale (DAC, 2002)