Transistor Chainning with Integrated Dynamic Folding for 1-D Leaf Cell Synthesis. - Krzysztof S. Berezowski (DSD, 2001)

Automatic Design of Binary and Multiple-Valued Logic Gates on RTD Series. - Krzysztof S. Berezowski; Sarma B. K. Vrudhula (DSD, 2005)

Multiple-Valued Logic Circuits Design Using Negative Differential Resistance Devices. - Krzysztof S. Berezowski; Sarma B. K. Vrudhula (J. Multiple Valued Log. Soft Comput., 2007)

Analytical results for design space exploration of multi-core processors employing thread migration. - Ravishankar Rao; Sarma B. K. Vrudhula; Krzysztof S. Berezowski (ISLPED, 2008)

Exploiting residue number system for power-efficient digital signal processing in embedded processors. - Rooju Chokshi; Krzysztof S. Berezowski; Aviral Shrivastava; Stanislaw J. Piestrak (CASES, 2009)

Out-of-order issue logic using sorting networks. - Siddhesh S. Mhambrey; Lawrence T. Clark; Satendra Kumar Maurya; Krzysztof S. Berezowski (ACM Great Lakes Symposium on VLSI, 2010)

A Low Power, High Performance Threshold Logic-Based Standard Cell Multiplier in 65 nm CMOS. - Samuel Leshner; Krzysztof S. Berezowski; Xiaoyin Yao; Gayathri Chalivendra; Saurabh Patel; Sarma B. K. Vrudhula (ISVLSI, 2010)

Fast and energy-efficient constant-coefficient FIR filters using residue number system. - Piotr Patronik; Krzysztof S. Berezowski; Stanislaw J. Piestrak; Janusz Biernat; Aviral Shrivastava (ISLPED, 2011)

Identification of Threshold Functions and Synthesis of Threshold Networks. - Tejaswi Gowda; Sarma B. K. Vrudhula; Niranjan Kulkarni; Krzysztof S. Berezowski (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Design of an RNS reverse converter for a new five-moduli special set. - Piotr Patronik; Krzysztof S. Berezowski; Janusz Biernat; Stanislaw J. Piestrak; Aviral Shrivastava (ACM Great Lakes Symposium on VLSI, 2012)

Empirical Recovery of Input Nonlinearity in Distributed Element Models. - Przemyslaw Sliwinski; Krzysztof S. Berezowski; Pawel Wachel; Gilles Sicard; Laurent Fesquet (ALCOSP, 2013)

Fast and accurate thermal modeling and simulation of manycore processors and workloads. - Bartosz Wojciechowski; Krzysztof S. Berezowski; Piotr Patronik; Janusz Biernat (Microelectron. J., 2013)

Calibration of RO-based temperature sensors for a toolset for measuring thermal behavior of FPGA devices. - Pawel Weber; Maciej Zagrabski; Bartosz Wojciechowski; Maciej Nikodem; Krzysztof Kepa; Krzysztof S. Berezowski (Microelectron. J., 2014)