Temperature-aware NBTI modeling and the impact of input vector control on performance degradation. - Yu Wang 002; Hong Luo; Ku He; Rong Luo; Huazhong Yang; Yuan Xie 001 (DATE, 2007)

A power gating scheme for ground bounce reduction during mode transition. - Ku He; Rong Luo; Yu Wang 002 (ICCD, 2007)

Modeling of PMOS NBTI Effect Considering Temperature Variation. - Hong Luo; Yu Wang 002; Ku He; Rong Luo; Huazhong Yang; Yuan Xie 001 (ISQED, 2007)

A Novel Gate-Level NBTI Delay Degradation Model with Stacking Effect. - Hong Luo; Yu Wang 002; Ku He; Rong Luo; Huazhong Yang; Yuan Xie 001 (PATMOS, 2007)

Two-Phase Fine-Grain Sleep Transistor Insertion Technique in Leakage Critical Circuits. - Yu Wang 002; Ku He; Rong Luo; Hui Wang 004; Huazhong Yang (IEEE Trans. Very Large Scale Integr. Syst., 2008)

Mitigation of intra-array SRAM variability using adaptive voltage architecture. - Ashish Kumar Singh; Ku He; Constantine Caramanis; Michael Orshansky (ICCAD, 2009)

Controlled timing-error acceptance for low energy IDCT design. - Ku He; Andreas Gerstlauer; Michael Orshansky (DATE, 2011)

Temperature-Aware NBTI Modeling and the Impact of Standby Leakage Reduction Techniques on Circuit Performance Degradation. - Yu Wang 002; Hong Luo; Ku He; Rong Luo; Huazhong Yang; Yuan Xie 001 (IEEE Trans. Dependable Secur. Comput., 2011)

Modeling and synthesis of quality-energy optimal approximate adders. - Jin Miao; Ku He; Andreas Gerstlauer; Michael Orshansky (ICCAD, 2012)

Low-energy signal processing using circuit-level timing-error acceptance. - Ku He; Andreas Gerstlauer; Michael Orshansky (ICICDT, 2012)

Low-energy digital filter design based on controlled timing error acceptance. - Ku He; Andreas Gerstlauer; Michael Orshansky (ISQED, 2013)

Circuit-Level Timing-Error Acceptance for Design of Energy-Efficient DCT/IDCT-Based Systems. - Ku He; Andreas Gerstlauer; Michael Orshansky (IEEE Trans. Circuits Syst. Video Technol., 2013)

Modeling and Optimization Techniques for Yield-Aware SRAM Post-Silicon Tuning. - Ashish Kumar Singh; Ku He; Constantine Caramanis; Michael Orshansky (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)