Design and implementation of a reconfigurable hardware for secure embedded systems. - Kuen-Cheng Chiang; Zhi-Wei Chen; Jean Jyh-Jiun Shann (AsiaCCS, 2006)

Selecting Heterogeneous Computation Blocks for Reconfigurable JPEG Codec Computing. - Wei-Ting Wang; Wai-Hong Tam; Yi-Chi Chen; Kuen-Cheng Chiang; Chung-Ping Chung (ERSA, 2007)

A predicate-aware modulo scheduling for improving resource efficiency of coarse grained reconfigurable architectures. - Jhin-Bin Jiang; Kuen-Cheng Chiang; Jean Jyh-Jiun Shann (SIES, 2012)

Modification and implementation of an edge-based fast intra prediction mode decision algorithm for H.264/AVC high resolution real-time systems. - Kuen-Cheng Chiang; Ming-Feng Wu; Jean Jyh-Jiun Shann (J. Vis. Commun. Image Represent., 2012)

Flexible Droplet Routing in Active Matrix-Based Digital Microfluidic Biochips. - Guan-Ruei Lu; Chun-Hao Kuo; Kuen-Cheng Chiang; Ansuman Banerjee; Bhargab B. Bhattacharya; Tsung-Yi Ho; Hung-Ming Chen (ACM Trans. Design Autom. Electr. Syst., 2018)