Static Pattern Predictor (SPP) Based Low Power Instruction Cache Design. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke; Saurav Bhattacharyya (Embedded Systems and Applications, 2003)

Incorporating Pattern Prediction Technique for Energy Efficient Filter Cache Design. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya; Prasanna Venkatesh Kannan (IWSOC, 2003)

Decode filter cache for energy efficient instruction cache hierarchy in super scalar architectures. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya (ASP-DAC, 2004)

Dynamic Filter Cache for Low Power Instruction Memory Hierarchy. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Saurav Bhattacharyya (DSD, 2004)

Custom Instruction Filter Cache Synthesis for Low-Power Embedded Systems. - Kugan Vivekanandarajah; Thambipillai Srikanthan (IEEE International Workshop on Rapid System Prototyping, 2005)

Customizable instruction cache hierarchy for embedded systems - Kugan Vivekanandarajah (2005)

Design considerations for multi-radio co-existence on asynchronous processors using LAD extensions. - Dipnarayan Guha; Kugan Vivekanandarajah; Thambipillai Srikanthan (CISS, 2006)

Profile Directed Instruction Cache Tuning for Embedded Systems. - Kugan Vivekanandarajah; Thambipillai Srikanthan; Christopher T. Clarke (ISVLSI, 2006)

Task Mapping in Heterogeneous MPSoCs for System Level Design. - Kugan Vivekanandarajah; Santhosh Kumar Pilakkat (ICECCS, 2008)