MOS based pseudo-resistors exhibiting Tera Ohms of Incremental Resistance for biomedical applications: Analysis and proof of concept. - Kulbhushan Sharma; Anisha Pathania; Rahul Pandey; Jaya Madan; Rajnish Sharma (Integr., 2021)

A Low-Noise High-Gain Recycling Folded Cascode Operational Transconductance Amplifier Based on Gate Driven and Quasi-Floating Bulk Technique. - Roowz Saini; Kulbhushan Sharma; Rajnish Sharma (J. Circuits Syst. Comput., 2022)

High-Stability and High-Speed 11T CNTFET SRAM Cell for MIMO Applications. - M. Elangovan; G. Saravanan; S. Jayanthi; P. Raja; Kulbhushan Sharma; S. Nireshkumar (J. Circuits Syst. Comput., 2023)

Read Improved and Low Leakage Power CNTFET Based Hybrid 10t SRAM Cell for Low Power Applications. - M. Elangovan; Kulbhushan Sharma; Ashish Sachdeva; Lipika Gupta (Circuits Syst. Signal Process., 2024)

Ultra-low power linearized FVF based BD double diffusor double differential pair transconductor. - Ravi Ranjan Kumar; Kulbhushan Sharma (Integr., 2025)

One-Sided Schmitt-Trigger-Based Low Power Read Decoupled 11T CNTFET SRAM with Improved Stability. - M. Elangovan; Kulbhushan Sharma; Ashish Sachdeva; Abdolreza Darabi (Circuits Syst. Signal Process., 2025)