Fast Multi-Objective Algorithmic Design Co-Exploration for FPGA-based Accelerators. - Kumud Nepal; Onur Ulusel; R. Iris Bahar; Sherief Reda (FCCM, 2012)

ABACUS: A technique for automated behavioral synthesis of approximate computing circuits. - Kumud Nepal; Yueting Li; R. Iris Bahar; Sherief Reda (DATE, 2014)

Fast Design Exploration for Performance, Power and Accuracy Tradeoffs in FPGA-Based Accelerators. - Onur Ulusel; Kumud Nepal; R. Iris Bahar; Sherief Reda (ACM Trans. Reconfigurable Technol. Syst., 2014)

Automated High-Level Generation of Low-Power Approximate Computing Circuits. - Kumud Nepal; Soheil Hashemi; Hokchhay Tann; R. Iris Bahar; Sherief Reda (IEEE Trans. Emerg. Top. Comput., 2019)