A 0.5V rate-resolution scalable SAR ADC with 63.7dB SFDR. - Hai Huang; Kun Ao; Zhiyong Guo; Qiang Li 021 (ISCAS, 2013)

A 14-bit 100MS/s pipelined A/D converter with 2b interstage redundancy. - Kun Ao; Yajuan He; Liang Li; Yuxin Wang; Qiang Li 021 (ISIC, 2014)