Structured ASIC, evolution or revolution? - Kun-Cheng Wu; Yu-Wen Tsai (ISPD, 2004)

Fault modeling and testing of retention flip-flops in low power designs. - Bing-Chuan Bai; Augusli Kifli; Chien-Mo James Li; Kun-Cheng Wu (ASP-DAC, 2009)

A Practical DFT Approach for Complex Low Power Designs. - Augusli Kifli; Y. W. Chen; Yu-Wen Tsai; Kun-Cheng Wu (Asian Test Symposium, 2009)

Power scan: DFT for power switches in VLSI designs. - Bing-Chuan Bai; Chien-Mo James Li; Augusli Kifli; Even Tsai; Kun-Cheng Wu (ITC, 2009)

SoC test integration platform. - Augusli Kifli; Kun-Cheng Wu (VLSI-DAT, 2015)