Area-Efficient Pipeline Architecture for Serial Real-Valued Fast Fourier Transform. - Kun Li 032; Hongji Fang; Zhenguo Ma; Feng Yu 003; Bo Zhang 097; Qianjian Xing (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Fast Floating-Point Multiply-Accumulator Optimized for Sparse Linear Algebra on FPGAs. - Kun Li 032; Xiangyu Hao; Zhenguo Ma; Feng Yu 003; Bo Zhang 097; Qianjian Xing (IEEE Trans. Very Large Scale Integr. Syst., 2025)