Measurement and Analysis of Variability in 45 nm Strained-Si CMOS Technology. - Liang-Teck Pang; Kun Qian 014; Costas J. Spanos; Borivoje Nikolic (IEEE J. Solid State Circuits, 2009)

Physically Justifiable Die-Level Modeling of Spatial Variation in View of Systematic Across Wafer Variability. - Lerong Cheng; Puneet Gupta 001; Costas J. Spanos; Kun Qian 014; Lei He 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2011)

Technology Variability From a Design Perspective. - Borivoje Nikolic; Ji-Hoon Park; Jaehwa Kwak; Bastien Giraud; Zheng Guo; Liang-Teck Pang; Seng Oon Toh; Ruzica Jevtic; Kun Qian 014; Costas J. Spanos (IEEE Trans. Circuits Syst. I Regul. Pap., 2011)