A Σ-Δ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. - Han-Il Lee; Je-Kwang Cho; Kun-Seok Lee; In-Chul Hwang; Tae-Won Ahn; Kyung-Suc Nah; Byeong-Ha Park (ESSCIRC, 2003)

Phase frequency detectors for fast frequency acquisition in zero-dead-zone CPPLLs for mobile communication systems. - Kun-Seok Lee; Byeong-Ha Park; Han-il Lee; Min Jong Yoh (ESSCIRC, 2003)

A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. - Han-Il Lee; Je-Kwang Cho; Kun-Seok Lee; In-Chul Hwang; Tae-Won Ahn; Kyung-Suc Nah; Byeong-Ha Park (IEEE J. Solid State Circuits, 2004)

Fast AFC technique using a code estimation and binary search algorithm for wideband frequency synthesis. - Kun-Seok Lee; Eun-yung Sung; In-Chul Hwang; Byeong-Ha Park (ESSCIRC, 2005)

A Charging Acceleration Technique for Highly Efficient Cascode Class-E CMOS Power Amplifiers. - Ockgoo Lee; Jeonghu Han; Kyu Hwan An; Dong Ho Lee; Kun-Seok Lee; Songcheol Hong; Chang-Ho Lee (IEEE J. Solid State Circuits, 2010)

A Triple-Mode Balanced Linear CMOS Power Amplifier Using a Switched-Quadrature Coupler. - Hamhee Jeon; Yunseo Park; Yan-Yu Huang; Jihwan Kim; Kun-Seok Lee; Chang-Ho Lee; J. Stevenson Kenney (IEEE J. Solid State Circuits, 2012)

20.5 A 40nm dual-band 3-stream 802.11a/b/g/n/ac MIMO WLAN SoC with 1.1Gb/s over-the-air throughput. - Ming He; Renaldi Winoto; Xiang Gao; Wayne Loeb; David Signoff; Wai Lau; Yuan Lu; Donghong Cui; Kun-Seok Lee; Sai-Wang Tam; Philip Godoy; Yung Chen; et al. (ISSCC, 2014)

A 2.4-GHz CMOS Power Amplifier With an Integrated Antenna Impedance Mismatch Correction System. - Youngchang Yoon; Hyoungsoo Kim; Hyungwook Kim; Kun-Seok Lee; Chang-Ho Lee; James S. Kenney (IEEE J. Solid State Circuits, 2014)

9.4 A 28nm CMOS digital fractional-N PLL with -245.5dB FOM and a frequency tripler for 802.11abgn/ac radio. - Xiang Gao; Luns Tee; Wanghua Wu; Kun-Seok Lee; Arvind Anumula Paramanandam; Anuranjan Jha; Norman Liu; Edwin Chan; Li Lin 009 (ISSCC, 2015)

9.4 A 2×2 WLAN and Bluetooth combo SoC in 28nm CMOS with on-chip WLAN digital power amplifier, integrated 2G/BT SP3T switch and BT pulling cancelation. - Renaldi Winoto; Ashkan Olyaei; Mohammad Hajirostam; Wai Lau; Xiang Gao; Arnab Mitra 002; Ovidiu Carnu; Philip Godoy; Luns Tee; Hao Li; Erdem Erdogan; Alden Wong; et al. (ISSCC, 2016)