Kun Zhang

Orcid: 0000-0001-7215-7953

Affiliations:
  • Beihang University, Fert Beijing Research Institute, Beijing, China
  • Beihang University, Qingdao Research Institute, Beihang-Goertek Joint Microelectronics Institute, China
  • Shandong University, Department of Physics, Jinan, China (PhD 2017)


According to our database1, Kun Zhang authored at least 11 papers between 2019 and 2024.

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Bibliography

2024
RSACIM: Resistance Summation Analog Computing in Memory With Accuracy Optimization Scheme Based on MRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., March, 2024

2023
Magnetic coupling governed pinning directions in magnetic tunnel junctions under magnetic field annealing with zero magnetic field cooling.
Sci. China Inf. Sci., April, 2023

2022
Reconfigurable Bit-Serial Operation Using Toggle SOT-MRAM for High-Performance Computing in Memory Architecture.
IEEE Trans. Circuits Syst. I Regul. Pap., 2022

2021
Time-Domain Computing in Memory Using Spintronics for Energy-Efficient Convolutional Neural Network.
IEEE Trans. Circuits Syst. I Regul. Pap., 2021

2020
A Self-Matching Complementary-Reference Sensing Scheme for High-Speed and Reliable Toggle Spin Torque MRAM.
IEEE Trans. Circuits Syst., 2020

A Diode-Enhanced Scheme for Giant Magnetoresistance Amplification and Reconfigurable Logic.
IEEE Access, 2020

Efficient Time-Domain In-Memory Computing Based on TST-MRAM.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

An In-memory Highly Reconfigurable Logic Circuit Based on Diode-assisted Enhanced Magnetoresistance Device.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

A Novel In-memory Computing Scheme Based on Toggle Spin Torque MRAM.
Proceedings of the GLSVLSI '20: Great Lakes Symposium on VLSI 2020, 2020

2019
High speed and reliable Sensing Scheme with Three Voltages for STT-MRAM.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019

Thermal Stable and Fast Perpendicular Shape Anisotropy Magnetic Tunnel Junction.
Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2019


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