Kunal Banerjee

Orcid: 0000-0002-0605-630X

Affiliations:
  • Walmart Global Tech, Bangalore, India
  • Intel Corporation, Bangalore, India (former)
  • IIT Kharagpur (former)


According to our database1, Kunal Banerjee authored at least 53 papers between 2011 and 2024.

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Bibliography

2024
BARGAIN: A Super-Resolution Technique to Gain High-Resolution Images for Barcodes.
Proceedings of the 7th Joint International Conference on Data Science & Management of Data (11th ACM IKDD CODS and 29th COMAD), 2024

2023
These Deals Won't Last! Longevity, Uniformity, and Bias in Product Badge Assignment in eCommerce Platforms.
Proceedings of the 2023 SIGIR Workshop on eCommerce co-located with the 46th International ACM SIGIR Conference on Research and Development in Information Retrieval (SIGIR 2023), 2023

Designing a Vision Transformer based Enhanced Text Extractor for Product Images.
Proceedings of the 6th Joint International Conference on Data Science & Management of Data (10th ACM IKDD CODS and 28th COMAD), 2023

A Dynamic Attention Based Graph Neural Network for Anomaly Prediction in Multi-Variate Time-Series & Its Application in Network Monitoring.
Proceedings of the 6th Joint International Conference on Data Science & Management of Data (10th ACM IKDD CODS and 28th COMAD), 2023

2022
Detecting Concept Drift in the Presence of Sparsity - A Case Study of Automated Change Risk Assessment System.
CoRR, 2022

These Deals Won't Last! Longevity, Uniformity and Bias in Product Badge Assignment in E-Commerce Platforms.
CoRR, 2022

Don't Miss the Fine Print! An Enhanced Framework to Extract Text from Low Resolution Images.
Proceedings of the 17th International Joint Conference on Computer Vision, 2022

Designing, Developing and Deploying an Enterprise Scale Network Monitoring System.
Proceedings of the ISEC 2022: 15th Innovations in Software Engineering Conference, Gandhinagar, India, February 24, 2022

Look before You Leap! Designing a Human-centered AI System for Change Risk Assessment.
Proceedings of the 14th International Conference on Agents and Artificial Intelligence, 2022

WALTS: Walmart AutoML Libraries, Tools and Services.
Proceedings of the 48th Euromicro Conference on Software Engineering and Advanced Applications, 2022

Developing a noise-aware AI system for change risk assessment with minimal human intervention.
Proceedings of the CIKM 2022 Workshops co-located with 31st ACM International Conference on Information and Knowledge Management (CIKM 2022), 2022

2021
Look Before You Leap! Designing a Human-Centered AI System for Change Risk Assessment.
CoRR, 2021

Exploring Alternatives to Softmax Function.
Proceedings of the 2nd International Conference on Deep Learning Theory and Applications, 2021

From Pixels to Words: A Scalable Journey of Text Information from Product Images to Retail Catalog.
Proceedings of the CIKM '21: The 30th ACM International Conference on Information and Knowledge Management, Virtual Event, Queensland, Australia, November 1, 2021

Designing a Bot for Efficient Distribution of Service Requests.
Proceedings of the 3rd IEEE/ACM International Workshop on Bots in Software Engineering, 2021

2020
Reliability Evaluation of Compressed Deep Learning Models.
Proceedings of the 11th IEEE Latin American Symposium on Circuits & Systems, 2020

Harnessing Deep Learning via a Single Building Block.
Proceedings of the 2020 IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2020

2019
Optimizing Deep Learning RNN Topologies on Intel Architecture.
Supercomput. Front. Innov., 2019

Counter-example generation procedure for path-based equivalence checkers.
IET Softw., 2019

K-TanH: Hardware Efficient Activations For Deep Learning.
CoRR, 2019

High-Performance Deep Learning via a Single Building Block.
CoRR, 2019

A Study of BFLOAT16 for Deep Learning Training.
CoRR, 2019

A Quick Introduction to Functional Verification of Array-Intensive Programs.
CoRR, 2019

Training Google Neural Machine Translation on an Intel CPU Cluster.
Proceedings of the 2019 IEEE International Conference on Cluster Computing, 2019

2018
Anatomy of high-performance deep learning convolutions on SIMD architectures.
Proceedings of the International Conference for High Performance Computing, 2018

Compiler-agnostic Translation Validation.
Proceedings of the 11th Innovations in Software Engineering Conference, ISEC 2018, Hyderabad, India, February 09, 2018

Automatic detection of inverse operations while avoiding loop unrolling.
Proceedings of the 40th International Conference on Software Engineering: Companion Proceeedings, 2018

Mixed Precision Training of Convolutional Neural Networks using Integer Operations.
Proceedings of the 6th International Conference on Learning Representations, 2018

2017
Deriving Bisimulation Relations from Path Extension Based Equivalence Checkers.
IEEE Trans. Software Eng., 2017

Deriving bisimulation relations from path based equivalence checkers.
Formal Aspects Comput., 2017

Ternary Residual Networks.
CoRR, 2017

An End-to-end Formal Verifier for Parallel Programs.
Proceedings of the 12th International Conference on Software Technologies, 2017

PRESGen: A Fully Automatic Equivalence Checker for Validating Optimizing and Parallelizing Transformations.
Proceedings of the 2017 Workshop on Software Engineering Methods for Parallel and High Performance Applications, 2017

An Equivalence Checking Framework for Array-Intensive Programs.
Proceedings of the Automated Technology for Verification and Analysis, 2017

2016
A Path Construction Algorithm for Translation Validation Using PRES+ Models.
Parallel Process. Lett., 2016

Data-race detection: the missing piece for an end-to-end semantic equivalence checker for parallelizing transformations of array-intensive programs.
Proceedings of the 3rd ACM SIGPLAN International Workshop on Libraries, 2016

Translation validation of loop and arithmetic transformations in the presence of recurrences.
Proceedings of the 17th ACM SIGPLAN/SIGBED Conference on Languages, 2016

Implementing an Efficient Path Based Equivalence Checker for Parallel Programs.
Proceedings of the ACM Workshop on Software Engineering Methods for Parallel and High Performance Applications, Kyoto, Japan, May 31, 2016

2015
Determining Equivalence of Expressions: An Automated Evaluator's Perspective.
Proceedings of the Seventh IEEE International Conference on Technology for Education, 2015

A translation validation framework for symbolic value propagation based equivalence checking of FSMDAs.
Proceedings of the 15th IEEE International Working Conference on Source Code Analysis and Manipulation, 2015

Establishing Equivalence of Expressions: An Automated Evaluator Designer's Perspective.
Proceedings of the Mining Intelligence and Knowledge Exploration, 2015

Translation Validation of Transformations of Embedded System Specifications Using Equivalence Checking.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

A Path-based Equivalence Checking Method for Petri Net based Models of Programs.
Proceedings of the ICSOFT-EA 2015, 2015

2014
Extending the FSMD Framework for Validating Code Motions of Array-Handling Programs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Verification of Code Motion Techniques Using Value Propagation.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

A BDD based secure hardware design method to guard against power analysis attacks.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

Extending the scope of translation validation by augmenting path based equivalence checkers with SMT solvers.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

Circuits and Synthesis Mechanism for Hardware Design to Counter Power Analysis Attacks.
Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013
Verification of Loop and Arithmetic Transformations of Array-Intensive Behaviors.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

Designing DPA Resistant Circuits Using BDD Architecture and Bottom Pre-charge Logic.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Translation Validation for PRES+ Models of Parallel Behaviours via an FSMD Equivalence Checker.
Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

A Value Propagation Based Equivalence Checking Method for Verification of Code Motion Techniques.
Proceedings of the International Symposium on Electronic System Design, 2012

2011
Equivalence Checking of Array-Intensive Programs.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011


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