Fast and accurate estimation of nano-scaled SRAM read failure probability using critical point sampling. - Ik Joon Chang; Kunhyuk Kang; Saibal Mukhopadhyay; Chris H. Kim; Kaushik Roy 001 (CICC, 2005)

Statistical Timing Analysis using Levelized Covariance Propagation. - Kunhyuk Kang; Bipul Chandra Paul; Kaushik Roy 001 (DATE, 2005)

Accurate estimation and modeling of total chip leakage considering inter- & intra-die process variations. - Amit Agarwal 001; Kunhyuk Kang; Kaushik Roy 001 (ICCAD, 2005)

Effectiveness of low power dual-Vt designs in nano-scale technologies under process parameter variations. - Amit Agarwal 001; Kunhyuk Kang; Swarup Bhunia; James D. Gallagher; Kaushik Roy 001 (ISLPED, 2005)

Reliable and self-repairing SRAM in nano-scale technologies using leakage and delay monitoring. - Saibal Mukhopadhyay; Kunhyuk Kang; Hamid Mahmoodi; Kaushik Roy 001 (ITC, 2005)

Temporal performance degradation under NBTI: estimation and design for improved reliability of nanoscale circuits. - Bipul Chandra Paul; Kunhyuk Kang; Haldun Kufluoglu; Muhammad Ashraful Alam; Kaushik Roy 001 (DATE, 2006)

Efficient Transistor-Level Sizing Technique under Temporal Performance Degradation due to NBTI. - Kunhyuk Kang; Haldun Kufluoglu; Muhammad Ashraful Alam; Kaushik Roy 001 (ICCD, 2006)

Statistical timing analysis using levelized covariance propagation considering systematic and random variations of process parameters. - Kunhyuk Kang; Bipul C. Paul; Kaushik Roy 001 (ACM Trans. Design Autom. Electr. Syst., 2006)

Characterization and Estimation of Circuit Reliability Degradation under NBTI using On-Line IDDQ Measurement. - Kunhyuk Kang; Keejong Kim; Ahmad E. Islam; Muhammad Ashraful Alam; Kaushik Roy 001 (DAC, 2007)

Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop. - Kunhyuk Kang; Keejong Kim; Kaushik Roy 001 (DAC, 2007)

High Performance and Low Power Electronics on Flexible Substrate. - Jing Li 073; Kunhyuk Kang; Aditya Bansal; Kaushik Roy 001 (DAC, 2007)

Estimation of statistical variation in temporal NBTI degradation and its impact on lifetime circuit performance. - Kunhyuk Kang; Sang Phill Park; Kaushik Roy 001; Muhammad Ashraful Alam (ICCAD, 2007)

Characterization of NBTI induced temporal performance degradation in nano-scale SRAM array using IDDQ. - Kunhyuk Kang; Muhammad Ashraful Alam; Kaushik Roy 001 (ITC, 2007)

Impact of Negative-Bias Temperature Instability in Nanoscale SRAM Array: Modeling and Analysis. - Kunhyuk Kang; Haldun Kufluoglu; Kaushik Roy 001; Muhammad Ashraful Alam (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Negative Bias Temperature Instability: Estimation and Design for Improved Reliability of Nanoscale Circuits. - Bipul Chandra Paul; Kunhyuk Kang; Haldun Kufluoglu; Muhammad Ashraful Alam; Kaushik Roy 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)

Device-Aware Yield-Centric Dual-Vt Design Under Parameter Variations in Nanoscale Technologies. - Amit Agarwal 001; Kunhyuk Kang; Swarup Bhunia; James D. Gallagher; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2007)

NBTI induced performance degradation in logic and memory circuits: how effectively can we approach a reliability solution? - Kunhyuk Kang; Saakshi Gangwal; Sang Phill Park; Kaushik Roy 001 (ASP-DAC, 2008)

Reliability Implications of Bias-Temperature Instability in Digital ICs. - Sang Phill Park; Kunhyuk Kang; Kaushik Roy 001 (IEEE Des. Test Comput., 2009)

Variation Estimation and Compensation Technique in Scaled LTPS TFT Circuits for Low-Power Low-Cost Applications. - Jing Li 073; Kunhyuk Kang; Kaushik Roy 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Fast and accurate estimation of SRAM read and hold failure probability using critical point sampling. - Ik Joon Chang; Jongsun Park 001; Kunhyuk Kang; Kaushik Roy 001 (IET Circuits Devices Syst., 2010)

Timed Input Pattern Generation for an Accurate Delay Calculation Under Multiple Input Switching. - Seung Hoon Choi; Kunhyuk Kang; Florentin Dartu; Kaushik Roy 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

On-Chip Variability Sensor Using Phase-Locked Loop for Detecting and Correcting Parametric Timing Failures. - Kunhyuk Kang; Sang Phill Park; Keejong Kim; Kaushik Roy 001 (IEEE Trans. Very Large Scale Integr. Syst., 2010)