Top-down pass-transistor logic design. - Kazuo Yano; Yasuhiko Sasaki; Kunihito Rikino; Koichi Seki (IEEE J. Solid State Circuits, 1996)

ALPS: An Automatic Layouter for Pass-Transistor Cell Synthesis. - Yasuhiko Sasaki; Kunihito Rikino; Kazuo Yano (ASP-DAC, 1998)