Accelerated Fault Simulation and Fault Grading in Combinational Circuits. - Kurt Antreich; Michael H. Schulz (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1987)

An accurate model for ambiguity delay simulation. - Thomas H. Krodel; Kurt Antreich (EURO-DAC, 1990)

Circuit Optimization Driven by Worst-Case Distances. - Kurt Antreich; Helmut E. Graeb (ICCAD, 1991)

GORDIAN: VLSI placement by quadratic programming and slicing optimization. - Jürgen M. Kleinhans; Georg Sigl; Frank M. Johannes; Kurt Antreich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1991)

Design verification considering manufacturing tolerances by using worst-caste distances. - Helmut E. Graeb; Claudia U. Wieser; Kurt Antreich (EURO-DAC, 1992)

Improved Methods for Worst-Case Analysis and Optimization Incorporating Operating Tolerances. - Helmut E. Graeb; Claudia U. Wieser; Kurt Antreich (DAC, 1993)

Application of Fault Parallelism to the Automatic Test Pattern Generation for Sequential Circuits. - Peter A. Krauss; Kurt Antreich (Parallel Computer Architectures, 1993)

Path Hashing to Accelerate Delay Fault Simulation. - Manfred Henftling; Hannes C. Wittmann; Kurt Antreich (DAC, 1994)

A new power estimation technique with application to decomposition of Boolean functions for low power. - Peter H. Schneider; Kurt Antreich; Ulf Schlichtmann (EURO-DAC, 1994)

PHIroute: A Parallel Hierarchical Sea-of-Gates Router. - Henning Spruth; Frank M. Johannes; Kurt Antreich (ISCAS, 1994)

Circuit analysis and optimization driven by worst-case distances. - Kurt Antreich; Helmut E. Graeb; Claudia U. Wieser (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Iterative placement improvement by network flow methods. - Konrad Doll; Frank M. Johannes; Kurt Antreich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1994)

Logic Clause Analysis for Delay Optimization. - Bernhard Rohfleisch; Bernd Wurth; Kurt Antreich (DAC, 1995)

Functional Multiple-Output Decomposition: Theory and an Implicit Algorithm. - Bernd Wurth; Klaus Eckl; Kurt Antreich (DAC, 1995)

A formal non-heuristic ATPG approach. - Manfred Henftling; Hannes C. Wittmann; Kurt Antreich (EURO-DAC, 1995)

A single-path-oriented fault-effect propagation in digital circuits considering multiple-path sensitization. - Manfred Henftling; Hannes C. Wittmann; Kurt Antreich (ICCAD, 1995)

Design based analog testing by Characteristic Observation Inference. - Walter M. Lindermeir; Helmut E. Graeb; Kurt Antreich (ICCAD, 1995)

Distributed Test Pattern Generation for Stuck-At Faults in Sequential Circuits. - Peter A. Krauss; Andreas Ganz; Kurt Antreich (J. Electron. Test., 1997)

DFG-Schwerpunktprogramm: Entwurf und Entwurfsmethodik eingebetteter Systeme. - Kurt Antreich; Franz J. Rammig; Wolfgang Rosenstiel; Detlef Schmid; Klaus Waldschmidt (Inform. Forsch. Entwickl., 1997)

Automating the Sizing of Analog CMOS Circuits by Consideration of Structural Constraints. - Robert Schwencker; Josef Eckmüller; Helmut E. Graeb; Kurt Antreich (DATE, 1999)

Simulationsbasierter Testentwurf für gemischt analog-digitale Systeme. - Michael Pronath; Volker Glöckel; Helmut Gräb; Kurt Antreich (Informationstechnik Tech. Inform., 1999)

Analog testing by characteristic observation inference. - Walter M. Lindermeir; Helmut E. Graeb; Kurt Antreich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

Functional multiple-output decomposition with application to technology mapping for lookup table-based FPGAs. - Bernd Wurth; Ulf Schlichtmann; Klaus Eckl; Kurt Antreich (ACM Trans. Design Autom. Electr. Syst., 1999)

WiCkeD: analog circuit synthesis incorporating mismatch. - Kurt Antreich; Josef Eckmüller; Helmut Graeb; Michael Pronath; Frank Schenkel; Robert Schwencker; Stephan Zizala (CICC, 2000)

The Generalized Boundary Curve-A Common Method for Automatic Nominal Design and Design Centering of Analog Circuits. - Robert Schwencker; Frank Schenkel; Helmut E. Graeb; Kurt Antreich (DATE, 2000)

IGRAINE-an Implication GRaph-bAsed engINE for fast implication, justification, and propagation. - Paul Tafertshofer; Andreas Ganz; Kurt Antreich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

A fast method for identifying matching-relevant transistor pairs. - Frank Schenkel; Michael Pronath; Helmut Graeb; Kurt Antreich (CICC, 2001)

Mismatch Analysis and Direct Yield Optimization by Spec-Wise Linearization and Feasibility-Guided Search. - Frank Schenkel; Michael Pronath; Stephan Zizala; Robert Schwencker; Helmut E. Graeb; Kurt Antreich (DAC, 2001)

The Sizing Rules Method for Analog Integrated Circuit Design. - Helmut E. Graeb; Stephan Zizala; Josef Eckmüller; Kurt Antreich (ICCAD, 2001)

Handling special constructs in symbolic simulation. - Alfred Kölbl; James H. Kukula; Kurt Antreich; Robert F. Damiano (DAC, 2002)

A Test Design Method for Floating Gate Defects (FGD) in Analog Integrated Circuits. - Michael Pronath; Helmut E. Graeb; Kurt Antreich (DATE, 2002)

Performance trade-off analysis of analog circuits by normal-boundary intersection. - Guido Stehr; Helmut E. Graeb; Kurt Antreich (DAC, 2003)

Initial Sizing of Analog Integrated Circuits by Centering Within Topology-Given Implicit Specification. - Guido Stehr; Michael Pronath; Frank Schenkel; Helmut E. Graeb; Kurt Antreich (ICCAD, 2003)

Analog performance space exploration by Fourier-Motzkin elimination with application to hierarchical sizing. - Guido Stehr; Helmut E. Graeb; Kurt Antreich (ICCAD, 2004)

Analog Performance Space Exploration by Normal-Boundary Intersection and by Fourier-Motzkin Elimination. - Guido Stehr; Helmut E. Graeb; Kurt Antreich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2007)