Extraction of Representative Keywords Considering Co-occurrence in Positive Documents. - Byeong Man Kim; Qing Li 005; KwangHo Lee; Bo-Yeong Kang (FSKD (2), 2005)

Durability improvement of polymer chamber of pulsatile extracorporeal life support system in terms of mechanical change. - Hyuk Choi; Seung Hoon Paik; Kwang Ho Lee; Byoung Goo Min; Yong Soon Won (Medical Biol. Eng. Comput., 2007)

Remarks on the Pocklington and Padró-Sáez Cube Root Algorithm in 𝔽q. - Geon Heo; Seokhwan Choi; Kwang Ho Lee; Namhun Koo; Soonhak Kwon (IACR Cryptol. ePrint Arch., 2014)

Self-Adhesive and Capacitive Carbon Nanotube-Based Electrode to Record Electroencephalograph Signals From the Hairy Scalp. - Seung Min Lee; Jeong Hun Kim; Cheolsoo Park; Ji-Young Hwang; Joung-Sook Hong; Kwang Ho Lee; Sang-Hoon Lee (IEEE Trans. Biomed. Eng., 2016)

A DVFS-aware cache bypassing technique for multiple clock domain mobile SoCs. - Joonho Kong; Kwangho Lee (IEICE Electron. Express, 2017)

Using board games to improve mathematical creativity. - Jungkyu Park 002; Kwangho Lee (Int. J. Knowl. Learn., 2017)

A 55.1 mW 1.62-to-8.1 Gb/s Video Interface Receiver Generating up to 680 MHz Stream Clock Over 20 dB Loss Channel. - Kwanseo Park; Jinhyung Lee; Kwangho Lee; Min-Seong Choo; Sungchun Jang; Sang-Hyeok Chu; Sungwoo Kim 001; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate All-Digital Injection-Locked Clock and Data Recovery with Maximum Timing-Margin Tracking Loop. - Min-Seong Choo; Han-Gon Ko; Sung-Yong Cho; Kwangho Lee; Deog-Kyoon Jeong (A-SSCC, 2018)

The effect of contents on sixth graders' understanding about the height of triangles. - Mi Jin Lee; Kwangho Lee (Int. J. Knowl. Learn., 2018)

An Optimum Injection-Timing Tracking Loop for 5-GHz, 1.13-mW/GHz RO-Based Injection-Locked PLL With 152-fs Integrated Jitter. - Min-Seong Choo; Han-Gon Ko; Sung-Yong Cho; Kwangho Lee; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

25-Gb/s Clocked Pluggable Optics for High-Density Data Center Interconnections. - Gyu-Seob Jeong; Jeongho Hwang; Hong-Seok Choi; Hyungrok Do; Daehyun Koh; Daeyoung Yun; Jinhyung Lee; Kwanseo Park; Han-Gon Ko; Kwangho Lee; Jiho Joo; Gyungock Kim; et al. (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 2.44-pJ/b 1.62-10-Gb/s Receiver for Next Generation Video Interface Equalizing 23-dB Loss With Adaptive 2-Tap Data DFE and 1-Tap Edge DFE. - Jinhyung Lee; Kwanseo Park; Kwangho Lee; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

A 0.1pJ/b/dB 1.62-to-10.8Gb/s Video Interface Receiver with Fully Adaptive Equalization Using Un-Even Data Level. - Jinhyung Lee; Kwangho Lee; Hyojun Kim; Byungmin Kim; Kwanseo Park; Deog-Kyoon Jeong (VLSI Circuits, 2019)

A 4-to-20Gb/s 1.87pJ/b Referenceless Digital CDR With Unlimited Frequency Detection Capability in 65nm CMOS. - Kwanseo Park; Kwangho Lee; Sung-Yong Cho; Jinhyung Lee; Jeongho Hwang; Min-Seong Choo; Deog-Kyoon Jeong (VLSI Circuits, 2019)

A 10-Gb/s, 0.03-mm2, 1.28-pJ/bit Half-Rate Injection-Locked CDR With Path Mismatch Tracking Loop in a 28-nm CMOS Technology. - Min-Seong Choo; Kwanseo Park; Han-Gon Ko; Sung-Yong Cho; Kwangho Lee; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2019)

Memory streaming acceleration for embedded systems with CPU-accelerator cooperative data processing. - Kwangho Lee; Joonho Kong; Young Geun Kim 001; Sung Woo Chung (Microprocess. Microsystems, 2019)

A 8.4Gb/s Low Power Transmitter with 1.66 pJ/b using 40: 1 Serializer for DisplayPort Interface. - Woosong Jung; Jinhyung Lee; Kwangho Lee; Hyojun Kim; Deog-Kyoon Jeong (ISOCC, 2020)

A 0.1-pJ/b/dB 28-Gb/s Maximum-Eye Tracking, Weight-Adjusting MM CDR and Adaptive DFE with Single Shared Error Sampler. - Moon-Chul Choi; Han-Gon Ko; Jonghyun Oh; Hye-Yoon Joo; Kwangho Lee; Deog-Kyoon Jeong (VLSI Circuits, 2020)

A 0.1-pJ/b/dB 1.62-to-10.8-Gb/s Video Interface Receiver With Jointly Adaptive CTLE and DFE Using Biased Data-Level Reference. - Jinhyung Lee; Kwangho Lee; Hyojun Kim; Byungmin Kim; Kwanseo Park; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2020)

A 64 Gb/s 2.09 pJ/b PAM-4 VCSEL Transmitter with Bandwidth Extension Techniques in 40 nm CMOS. - Hyungrok Do; Jung-Woo Sull; Seunghyun Lee; Kwangho Lee; Deog-Kyoon Jeong (A-SSCC, 2021)

A 48Gb/s 2.4pJ/b PAM-4 Baud-Rate Digital CDR with Stochastic Phase Detection Technique in 40nm CMOS. - Haram Ju; Kwangho Lee; Woosong Jung; Deog-Kyoon Jeong (A-SSCC, 2021)

A 48 Gb/s PAM4 receiver with Baud-rate phase-detector for multi-level signal modulation in 40 nm CMOS. - Kwangho Lee; Woosong Jung; Haram Ju; Jinhyung Lee; Deog-Kyoon Jeong (A-SSCC, 2021)

Profiling Based I/O Optimization on the CE Devices. - Jungseung Lee; Huijin Park; Kwangho Lee (ICCE, 2021)

A 4-20-Gb/s 1.87-pJ/b Continuous-Rate Digital CDR Circuit With Unlimited Frequency Acquisition Capability in 65-nm CMOS. - Kwanseo Park; Kwangho Lee; Sung-Yong Cho; Jinhyung Lee; Jeongho Hwang; Min-Seong Choo; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2021)

An Adaptive Offset Cancellation Scheme and Shared-Summer Adaptive DFE for 0.068 pJ/b/dB 1.62-to-10 Gb/s Low-Power Receiver in 40 nm CMOS. - Kwangho Lee; Hyojun Kim; Woosong Jung; Jinhyung Lee; Haram Ju; Kwanseo Park; Ook Kim; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

Cross-Domain Style Mixing for Face Cartoonization. - Seungkwon Kim; Chaeheon Gwak; Dohyun Kim; Kwangho Lee; Jihye Back; Namhyuk Ahn; Daesik Kim (CoRR, 2022)

Design Techniques for 48-Gb/s 2.4-pJ/b PAM-4 Baud-Rate CDR With Stochastic Phase Detector. - Haram Ju; Kwangho Lee; Kwanseo Park; Woosong Jung; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2022)

A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. - Moon-Chul Choi; Sanghee Lee 002; Seungha Roh; Kwangho Lee; Jonghyun Oh; Sungwoo Kim 001; Kwandong Kim; Woo-Seok Choi; Jaeha Kim; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector. - Seungha Roh; Kwangho Lee; Minkyo Shim; Moon-Chul Choi; Deog-Kyoon Jeong (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Chupa: Carving 3D Clothed Humans from Skinned Shape Priors using 2D Diffusion Probabilistic Models. - Byungjun Kim; Patrick Kwon; Kwangho Lee; Myunggi Lee; Sookwan Han; Daesik Kim; Hanbyul Joo (ICCV, 2023)

LPMM: Intuitive Pose Control for Neural Talking-Head Model via Landmark-Parameter Morphable Model. - Kwangho Lee; Patrick Kwon; Myung-Ki Lee; Namhyuk Ahn; Junsoo Lee (CoRR, 2023)

A 48 Gb/s PAM-4 Receiver With Pre-Cursor Adjustable Baud-Rate Phase Detector in 40 nm CMOS. - Woosong Jung; Kwangho Lee; Kwanseo Park; Haram Ju; Jinhyung Lee; Deog-Kyoon Jeong (IEEE J. Solid State Circuits, 2023)

Identification of Location and Geometry of Invisible Internal Defects in Structures using Deep Learning and Surface Deformation Field. - Suman Timilsina; Seong Min Jang; Cheol Woo Jo; Yong Nam Kwon; Kee-Sun Sohn; Kwang Ho Lee; Ji Sik Kim (Adv. Intell. Syst., 2023)