Dose map and placement co-optimization for timing yield enhancement and leakage power reduction. - Kwangok Jeong; Andrew B. Kahng; Chul-Hong Park; Hailong Yao (DAC, 2008)

Quantified Impacts of Guardband Reduction on Design Process Outcomes. - Kwangok Jeong; Andrew B. Kahng; Kambiz Samadi (ISQED, 2008)

Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. - Kwangok Jeong; Andrew B. Kahng (ASP-DAC, 2009)

Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography. - Mohit Gupta; Kwangok Jeong; Andrew B. Kahng (ICCAD, 2009)

Revisiting the linear programming framework for leakage power vs. performance optimization. - Kwangok Jeong; Andrew B. Kahng; Hailong Yao (ISQED, 2009)

Is overlay error more important than interconnect variations in double patterning? - Kwangok Jeong; Andrew B. Kahng; Rasit Onur Topaloglu (SLIP, 2009)

Methodology from chaos in IC implementation. - Kwangok Jeong; Andrew B. Kahng (ISQED, 2010)

Toward effective utilization of timing exceptions in design optimization. - Kwangok Jeong; Andrew B. Kahng; Seokhyeong Kang (ISQED, 2010)

Assessing chip-level impact of double patterning lithography. - Kwangok Jeong; Andrew B. Kahng; Rasit Onur Topaloglu (ISQED, 2010)

Accurate Machine-Learning-Based On-Chip Router Modeling. - Kwangok Jeong; Andrew B. Kahng; Binshan Lin; Kambiz Samadi (IEEE Embed. Syst. Lett., 2010)

Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning Lithography. - Mohit Gupta; Kwangok Jeong; Andrew B. Kahng (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power. - Kwangok Jeong; Andrew B. Kahng; Chul-Hong Park; Hailong Yao (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2010)

Stability and scalability in global routing. - Sung Kyu Han; Kwangok Jeong; Andrew B. Kahng; Jingwei Lu (SLIP, 2011)

Toward PDN resource estimation: A law of general power density. - Kwangok Jeong; Andrew B. Kahng (SLIP, 2011)

Variability assessment and mitigation in advanced VLSI manufacturing through design-manufacturing co-optimization - Kwangok Jeong (2011)

MAPG: Memory access power gating. - Kwangok Jeong; Andrew B. Kahng; Seokhyeong Kang; Tajana Simunic Rosing; Richard D. Strong (DATE, 2012)

SRAM On-Chip Monitoring Methodology for Energy Efficient Memory Operation at Near Threshold Voltage. - Taehwan Kim 007; Kwangok Jeong; Taewhan Kim 001; Kyu-Myung Choi (ISVLSI, 2019)

Synthesis of Hardware Performance Monitoring and Prediction Flow Adapting to Near-Threshold Computing and Advanced Process Nodes. - Jeongwoo Heo; Kwangok Jeong; Taewhan Kim 001; Kyu-Myung Choi (ASP-DAC, 2020)

SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage. - Taehwan Kim 007; Kwangok Jeong; Jungyun Choi; Taewhan Kim 001; Kyu-Myung Choi (Integr., 2020)

Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon. - Jeongwoo Heo; Kwangok Jeong; Jungyun Choi; Taewhan Kim 001; Kyumyung Choi (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2022)