A 3.8-5.5-GHz Multi-Band CMOS Frequency Synthesizer for WPAN/WLAN Applications. - Ja-Yol Lee; Kwi-Dong Kim; Jong-Kee Kwon; Seung-Chul Lee; Jongdae Kim; Sang-Heung Lee (CICC, 2006)

A 10-bit 400-MS/s 160-mW 0.13-μm CMOS dual-channel pipeline ADC without channel mismatch calibration. - Seung-Chul Lee; Kwi-Dong Kim; Jong-Kee Kwon; Jongdae Kim; Seung-Hoon Lee (IEEE J. Solid State Circuits, 2006)

A 4.7mW 0.32mm2 10b 30MS/s Pipelined ADC Without a Front-End S/H in 90nm CMOS. - Young-Deuk Jeon; Seung-Chul Lee; Kwi-Dong Kim; Jong-Kee Kwon; Jongdae Kim (ISSCC, 2007)

A 10b 205MS/s 1mm2 90nm CMOS Pipeline ADC for Flat-Panel Display Applications. - Seung-Chul Lee; Young-Deuk Jeon; Kwi-Dong Kim; Jong-Kee Kwon; Jongdae Kim; Jeong-Woong Moon; Woo-Yol Lee (ISSCC, 2007)

A 105.5 dB, 0.49 mm2 Audio ΣΔ modulator using chopper stabilization and fully randomized DWA. - Yi-Gyeong Kim; Min-Hyung Cho; Kwi-Dong Kim; Jong-Kee Kwon; Jongdae Kim (CICC, 2008)

ESD protection circuit with low triggering voltage and fast turn-on using substrate-triggered technique. - Yong-Seo Koo; Kwi-Dong Kim; Jong-Kee Kwon (IEICE Electron. Express, 2009)

A 9.15mW 0.22mm2 10b 204MS/s pipelined SAR ADC in 65nm CMOS. - Young-Deuk Jeon; Young-Kyun Cho; Jae-Won Nam; Kwi-Dong Kim; Woo-Yol Lee; Kuk-Tae Hong; Jong-Kee Kwon (CICC, 2010)

A Dual-Channel Pipelined ADC With Sub-ADC Based on Flash-SAR Architecture. - Young-Deuk Jeon; Jae-Won Nam; Kwi-Dong Kim; Tae Moon Roh; Jong-Kee Kwon (IEEE Trans. Circuits Syst. II Express Briefs, 2012)