Simultaneous Transistor Folding and Placement in Standard Cell Layout Synthesis. - Kyeonghyeon Baek; Taewhan Kim 001 (ICCAD, 2021)

Pin Accessibility and Routing Congestion Aware DRC Hotspot Prediction Using Graph Neural Network and U-Net. - Kyeonghyeon Baek; Hyunbum Park; Suwan Kim; Kyumyung Choi; Taewhan Kim 001 (ICCAD, 2022)

Methodology of Resolving Design Rule Checking Violations Coupled with Fully Compatible Prediction Model. - Suwan Kim; Hyunbum Park; Kyeonghyeon Baek; Kyumyung Choi; Taewhan Kim 001 (ISPD, 2024)

CSyn-fp: Standard Cell Synthesis of Advanced Nodes With Simultaneous Transistor Folding and Placement. - Kyeonghyeon Baek; Taewhan Kim 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)

Pin Accessibility and Routing Congestion Aware DRC Hotspot Prediction for Designs in Advanced Technology Nodes With Consolidated Practical Applicability and Sustainability. - Hyunbum Park; Kyeonghyeon Baek; Suwan Kim; Kyumyung Choi; Taewhan Kim 001 (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2024)