Cohesive techniques for cell layout optimization supporting 2D metal-1 routing completion. - Kyeongrok Jo; Seyong Ahn; Taewhan Kim 001; Kyu-Myung Choi (ASP-DAC, 2018)

Design Rule Evaluation Framework Using Automatic Cell Layout Generator for Design Technology Co-Optimization. - Kyeongrok Jo; Seyong Ahn; Jungho Do; Taejoong Song; Taewhan Kim 001; Kyu-Myung Choi (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Boosting Pin Accessibility Through Cell Layout Topology Diversification. - Suwan Kim; Kyeongrok Jo; Taewhan Kim 001 (ASP-DAC, 2021)

Optimal Transistor Placement Combined with Global In-cell Routing in Standard Cell Layout Synthesis. - Kyeongrok Jo; Taewhan Kim 001 (ICCD, 2021)

Synthesis and Utilization of Standard Cells Amenable to Gear Ratio of Gate-Metal Pitches for Improving Pin Accessibility. - Jooyeon Jeong; Sehyeon Chung; Kyeongrok Jo; Taewhan Kim 001 (DATE, 2023)