Scientific applications vs. SPEC-FP: a comparison of program behavior. - Kyle Rupnow; Arun Rodrigues; Keith D. Underwood; Katherine Compton (ICS, 2006)

Scientific Application Acceleration with Reconfigurable Functional Units. - Kyle Rupnow; Keith D. Underwood; Katherine Compton (FCCM, 2007)

Reconfigurable Functional Units for Scientific Superscalar Processors. - Jonathan Evans; Kyle Rupnow; Katherine Compton (FPT, 2007)

Block, Drop or Roll(back): Alternative Preemption Methods for RH Multi-Tasking. - Kyle Rupnow; Wenyin Fu; Katherine Compton (FCCM, 2009)

Performance metrics for hybrid multi-tasking systems. - Kyle Rupnow; Jacob Adriaens; Wenyin Fu; Katherine Compton (FPL, 2009)

Accurately evaluating application performance in simulated hybrid multi-tasking systems. - Kyle Rupnow; Jacob Adriaens; Wenyin Fu; Katherine Compton (FPGA, 2010)

A Reconfigurable Computing Scheduler Optimized for Multicore Systems. - Philip Garcia; Kyle Rupnow; Katherine Compton (FPL, 2010)

Dynamic Binding and Scheduling of Firm-Deadline Tasks on Heterogeneous Compute Resources. - Hsiang-Kuo Tang; Kyle Rupnow; Parmesh Ramanathan; Katherine Compton (RTCSA, 2010)

A study of high-level synthesis: Promises and challenges. - Kyle Rupnow; Yun Liang 001; Yinan Li; Deming Chen (ASICON, 2011)

High level synthesis of stereo matching: Productivity, performance, and software constraints. - Kyle Rupnow; Yun Liang 001; Yinan Li; Dongbo Min; Minh N. Do; Deming Chen (FPT, 2011)

Scientific Application Demands on a Reconfigurable Functional Unit Interface. - Kyle Rupnow; Keith D. Underwood; Katherine Compton (ACM Trans. Reconfigurable Technol. Syst., 2011)

Real-time implementation and performance optimization of 3D sound localization on GPUs. - Yun Liang 001; Zheng Cui; Shengkui Zhao; Kyle Rupnow; Yihao Zhang; Douglas L. Jones; Deming Chen (DATE, 2012)

An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. - Zheng Cui; Yun Liang 001; Kyle Rupnow; Deming Chen (IPDPS, 2012)

High-Level Synthesis: Productivity, Performance, and Software Constraints. - Yun Liang 001; Kyle Rupnow; Yinan Li; Dongbo Min; Minh N. Do; Deming Chen (J. Electr. Comput. Eng., 2012)

High-level synthesis of multiple dependent CUDA kernels on FPGA. - Swathi T. Gurumani; Hisham Cholakkal; Yun Liang 001; Kyle Rupnow; Deming Chen (ASP-DAC, 2013)

Register and thread structure optimization for GPUs. - Yun Liang 001; Zheng Cui; Kyle Rupnow; Deming Chen (ASP-DAC, 2013)

Improving high level synthesis optimization opportunity through polyhedral transformations. - Wei Zuo; Yun Liang 001; Peng Li 031; Kyle Rupnow; Deming Chen; Jason Cong (FPGA, 2013)

High-level synthesis with behavioral level multi-cycle path analysis. - Hongbin Zheng; Swathi T. Gurumani; Liwei Yang; Deming Chen; Kyle Rupnow (FPL, 2013)

Integrated CUDA-to-FPGA Synthesis with Network-on-Chip. - Swathi T. Gurumani; Jacob Tolar; Yao Chen 008; Yun Liang 001; Kyle Rupnow; Deming Chen (FCCM, 2014)

Fast and effective placement and routing directed high-level synthesis for FPGAs. - Hongbin Zheng; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (FPGA, 2014)

New solutions for system-level and high-level synthesis (Invited paper). - Wei Zuo; Hongbin Zheng; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (ISIC, 2014)

High-Level Synthesis With Behavioral-Level Multicycle Path Analysis. - Hongbin Zheng; Swathi T. Gurumani; Liwei Yang; Deming Chen; Kyle Rupnow (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

System-level design solutions: Enabling the IoT explosion. - Liwei Yang; Yao Chen 008; Wei Zuo; Tan Nguyen; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (ASICON, 2015)

Behavioral-level IP integration in high-level synthesis. - Liwei Yang; Swathi T. Gurumani; Deming Chen; Kyle Rupnow (FPT, 2015)

JIT trace-based verification for high-level synthesis. - Liwei Yang; Magzhan Ikram; Swathi T. Gurumani; Suhaib A. Fahmy; Deming Chen; Kyle Rupnow (FPT, 2015)

Efficient GPU Spatial-Temporal Multitasking. - Yun Liang 001; Huynh Phung Huynh; Kyle Rupnow; Rick Siow Mong Goh; Deming Chen (IEEE Trans. Parallel Distributed Syst., 2015)

Designing high-quality hardware on a development effort budget: A study of the current state of high-level synthesis. - Zelei Sun; Keith A. Campbell; Wei Zuo; Kyle Rupnow; Swathi T. Gurumani; Frederic Doucet; Deming Chen (ASP-DAC, 2016)

Debugging and verifying SoC designs through effective cross-layer hardware-software co-simulation. - Keith A. Campbell; Leon He; Liwei Yang; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (DAC, 2016)

Real-time system-level implementation of a telepresence robot using an embedded GPU platform. - Muhammad Teguh Satria; Swathi T. Gurumani; Wang Zheng; Keng Peng Tee; Augustine Koh; Pan Yu; Kyle Rupnow; Deming Chen (DATE, 2016)

Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. - Gowthami Jayashri Manikandan; Sitao Huang; Kyle Rupnow; Wen-mei W. Hwu; Deming Chen (FCCM, 2016)

AutoSLIDE: Automatic Source-Level Instrumentation and Debugging for HLS. - Liwei Yang; Swathi T. Gurumani; Deming Chen; Kyle Rupnow (FCCM, 2016)

High Level Synthesis of Complex Applications: An H.264 Video Decoder. - Xinheng Liu; Yao Chen 008; Tan Nguyen; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (FPGA, 2016)

FCUDA-SoC: Platform Integration for Field-Programmable SoC with the CUDA-to-FPGA Compiler. - Tan Nguyen; Swathi T. Gurumani; Kyle Rupnow; Deming Chen (FPGA, 2016)

Automated Verification Code Generation in HLS Using Software Execution Traces (Abstract Only). - Liwei Yang; Swathi T. Gurumani; Suhaib A. Fahmy; Deming Chen; Kyle Rupnow (FPGA, 2016)

SoC, NoC and Hierarchical Bus Implementations of Applications on FPGAs Using the FCUDA Flow. - Tan Nguyen; Yao Chen 008; Kyle Rupnow; Swathi T. Gurumani; Deming Chen (ISVLSI, 2016)

Platform choices and design demands for IoT platforms: cost, power, and performance tradeoffs. - Deming Chen; Jason Cong; Swathi T. Gurumani; Wen-mei W. Hwu; Kyle Rupnow; Zhiru Zhang (IET Cyper-Phys. Syst.: Theory & Appl., 2016)

FCUDA-HB: Hierarchical and Scalable Bus Architecture Generation on FPGAs With the FCUDA Flow. - Ying Chen; Tan Nguyen; Yao Chen 008; Swathi T. Gurumani; Yun Liang 001; Kyle Rupnow; Jason Cong; Wen-mei W. Hwu; Deming Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

An Accurate GPU Performance Model for Effective Control Flow Divergence Optimization. - Yun Liang 001; Muhammad Teguh Satria; Kyle Rupnow; Deming Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

FCUDA-NoC: A Scalable and Efficient Network-on-Chip Implementation for the CUDA-to-FPGA Flow. - Yao Chen 008; Swathi T. Gurumani; Yun Liang 001; Guofeng Li; Donghui Guo; Kyle Rupnow; Deming Chen (IEEE Trans. Very Large Scale Integr. Syst., 2016)

Hardware Acceleration of the Pair-HMM Algorithm for DNA Variant Calling. - Sitao Huang; Gowthami Jayashri Manikandan; Anand Ramachandran 001; Kyle Rupnow; Wen-mei W. Hwu; Deming Chen (FPGA, 2017)

High-performance video content recognition with long-term recurrent convolutional network for FPGA. - Xiaofan Zhang 001; Xinheng Liu; Anand Ramachandran 001; Chuanhao Zhuge; Shibin Tang; Peng Ouyang; Zuofu Cheng; Kyle Rupnow; Deming Chen (FPL, 2017)

Machine learning on FPGAs to face the IoT revolution. - Xiaofan Zhang 001; Anand Ramachandran 001; Chuanhao Zhuge; Di He 004; Wei Zuo; Zuofu Cheng; Kyle Rupnow; Deming Chen (ICCAD, 2017)

FPGA/DNN Co-Design: An Efficient Design Methodology for IoT Intelligence on the Edge. - Cong Hao; Xiaofan Zhang 001; Yuhong Li; Sitao Huang; Jinjun Xiong; Kyle Rupnow; Wen-Mei Hwu; Deming Chen (DAC, 2019)

SkyNet: A Champion Model for DAC-SDC on Low Power Object Detection. - Xiaofan Zhang 001; Cong Hao; Haoming Lu; Jiachen Li 003; Yuhong Li; Yuchen Fan; Kyle Rupnow; Jinjun Xiong; Thomas S. Huang; Honghui Shi; Wen-Mei Hwu; Deming Chen (CoRR, 2019)

Hybrid Quick Error Detection: Validation and Debug of SoCs Through High-Level Synthesis. - Keith A. Campbell; David Lin; Leon He; Liwei Yang; Swathi T. Gurumani; Kyle Rupnow; Subhasish Mitra; Deming Chen (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

SkyNet: a Hardware-Efficient Method for Object Detection and Tracking on Embedded Systems. - Xiaofan Zhang 001; Haoming Lu; Cong Hao; Jiachen Li 003; Bowen Cheng; Yuhong Li; Kyle Rupnow; Jinjun Xiong; Thomas S. Huang; Honghui Shi; Wen-Mei Hwu; Deming Chen (MLSys, 2020)