A Scalable Model of Shielded Capacitors Using Mirror Image Effects. - Koji Ishibashi; Ivan Chee Hong Lai; Kyoya Takano; Minoru Fujishima (IEICE Trans. Electron., 2007)

4.8 GHz CMOS Frequency Multiplier Using Subharmonic Pulse-Injection Locking for Spurious Suppression. - Kyoya Takano; Mizuki Motoyoshi; Minoru Fujishima (IEICE Trans. Electron., 2008)

140GHz CMOS amplifier with group delay variation of 10.2ps and 0.1dB bandwidth of 12GHz. - Mizuki Motoyoshi; Ryuichi Fujimoto; Kyoya Takano; Minoru Fujishima (IEICE Electron. Express, 2011)

Device Modeling Techniques for High-Frequency Circuits Design Using Bond-Based Design at over 100 GHz. - Ryuichi Fujimoto; Kyoya Takano; Mizuki Motoyoshi; Uroschanit Yodprasit; Minoru Fujishima (IEICE Trans. Electron., 2011)

Analysis of De-Embedding Error Cancellation in Cascade Circuit Design. - Kyoya Takano; Ryuichi Fujimoto; Kosuke Katayama; Mizuki Motoyoshi; Minoru Fujishima (IEICE Trans. Electron., 2011)

135 GHz 98 mW 10 Gbps ASK transmitter and receiver chipset in 40 nm CMOS. - Naoko Ono; Mizuki Motoyoshi; Kyoya Takano; Kosuke Katayama; Ryuichi Fujimoto; Minoru Fujishima (VLSIC, 2012)

A 120-GHz Transmitter and Receiver Chipset with 9-Gbps Data Rate Using 65-nm CMOS Technology. - Ryuichi Fujimoto; Mizuki Motoyoshi; Kyoya Takano; Uroschanit Yodprasit; Minoru Fujishima (IEICE Trans. Electron., 2012)

Bias-Voltage-Dependent Subcircuit Model for Millimeter-Wave CMOS Circuit. - Kosuke Katayama; Mizuki Motoyoshi; Kyoya Takano; Ryuichi Fujimoto; Minoru Fujishima (IEICE Trans. Electron., 2012)

14.4mW 10Gbps CMOS limiting amplifier with local DC offset cancellers. - Kyoya Takano; Ryuichi Fujimoto; Mizuki Motoyoshi; Kosuke Katayama; Minoru Fujishima (RWS, 2013)

A 120 GHz/140 GHz Dual-Channel OOK Receiver Using 65 nm CMOS Technology. - Ryuichi Fujimoto; Mizuki Motoyoshi; Kyoya Takano; Minoru Fujishima (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2013)

Modeling of Short-Millimeter-Wave CMOS Transmission Line with Lossy Dielectrics with Specific Absorption Spectrum. - Kyoya Takano; Shuhei Amakawa; Kosuke Katayama; Mizuki Motoyoshi; Minoru Fujishima (IEICE Trans. Electron., 2013)

98 mW 10 Gbps Wireless Transceiver Chipset With D-Band CMOS Circuits. - Minoru Fujishima; Mizuki Motoyoshi; Kosuke Katayama; Kyoya Takano; Naoko Ono; Ryuichi Fujimoto (IEEE J. Solid State Circuits, 2013)

E-Band 65nm CMOS Low-Noise Amplifier Design Using Gain-Boost Technique. - Kosuke Katayama; Mizuki Motoyoshi; Kyoya Takano; Chen Yang Li; Shuhei Amakawa; Minoru Fujishima (IEICE Trans. Electron., 2014)

135GHz 98mW 10Gbps CMOS Amplitude Shift Keying Transmitter and Receiver Chipset. - Mizuki Motoyoshi; Naoko Ono; Kosuke Katayama; Kyoya Takano; Minoru Fujishima (IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2014)

124-GHz CMOS quadrature voltage-controlled oscillator with fundamental injection locking. - Kyoya Takano; Kosuke Katayama; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (A-SSCC, 2015)

Tehrahertz CMOS Design for Low-Power and High-Speed Wireless Communication. - Minoru Fujishima; Shuhei Amakawa; Kyoya Takano; Kosuke Katayama; Takeshi Yoshida (IEICE Trans. Electron., 2015)

20.1 A 300GHz 40nm CMOS transmitter with 32-QAM 17.5Gb/s/ch capability over 6 channels. - Kosuke Katayama; Kyoya Takano; Shuhei Amakawa; Shinsuke Hara; Akifumi Kasamatsu; Koichi Mizuno; Kazuaki Takahashi; Takeshi Yoshida; Minoru Fujishima (ISSCC, 2016)

Compact 141-GHz Differential Amplifier with 20-dB Peak Gain and 22-GHz 3-dB Bandwidth. - Shinsuke Hara; Kosuke Katayama; Kyoya Takano; Issei Watanabe; Norihiko Sekine; Akifumi Kasamatsu; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (IEICE Trans. Electron., 2016)

A 300 GHz CMOS Transmitter With 32-QAM 17.5 Gb/s/ch Capability Over Six Channels. - Kosuke Katayama; Kyoya Takano; Shuhei Amakawa; Shinsuke Hara; Akifumi Kasamatsu; Koichi Mizuno; Kazuaki Takahashi; Takeshi Yoshida; Minoru Fujishima (IEEE J. Solid State Circuits, 2016)

17.9 A 105Gb/s 300GHz CMOS transmitter. - Kyoya Takano; Shuhei Amakawa; Kosuke Katayama; Shinsuke Hara; Ruibing Dong; Akifumi Kasamatsu; Iwao Hosako; Koichi Mizuno; Kazuaki Takahashi; Takeshi Yoshida; Minoru Fujishima (ISSCC, 2017)

A 37-GHz-Input Divide-by-36 Injection-Locked Frequency Divider with 1.6-GHz Lock Range. - Sangyeop Lee; Kyoya Takano; Ruibing Dong; Shuhei Amakawa; Takeshi Yoshida; Minoru Fujishima (A-SSCC, 2018)

Power-amplifier-inserted Transversal Filter that Recovers Quantization Noise Power by CMOS Rectifier. - Yuto Tanaka; Yohtaro Umeda; Kyoya Takano (ICECS, 2018)

300-GHz CMOS transmitter module with built-in waveguide transition on a multilayered glass epoxy PCB. - Kyoya Takano; Kosuke Katayama; Shinsuke Hara; Ruibing Dong; Koichi Mizuno; Kazuaki Takahashi; Akifumi Kasamatsu; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (RWS, 2018)

32-Gbit/s CMOS Receivers in 300-GHz Band. - Shinsuke Hara; Kosuke Katayama; Kyoya Takano; Ruibing Dong; Issei Watanabe; Norihiko Sekine; Akifumi Kasamatsu; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (IEICE Trans. Electron., 2018)

A 76-Gbit/s 265-GHz CMOS Receiver. - Shinsuke Hara; Ruibing Dong; Sangyeop Lee; Kyoya Takano; Naoya Toshida; Satoru Tanoi; Tatsuo Hagino; Mohamed H. Mubarak; Norihiko Sekine; Issei Watanabe; Akifumi Kasamatsu; Kunio Sakakibara; et al. (A-SSCC, 2021)

A 272-GHz CMOS Analog BPSK/QPSK Demodulator for IEEE 802.15.3d. - Sangyeop Lee; Shinsuke Hara; Ruibing Dong; Kyoya Takano; Shuhei Amakawa; Takeshi Yoshida; Minoru Fujishima (ESSCIRC, 2021)

Frequency-Interleaved ADC with RF Equivalent Ideal Filter for Broadband Optical Communication Receivers. - Ryo Kabeya; Yohtaro Umeda; Kyoya Takano (ICECS, 2021)

DAC Bandwidth Tripler with 3: 1 Image-Rejection Analog Multiplexer. - Yusuke Yokoi; Yusuke Takai; Joe Sawada; Takumi Kamo; Yohtaro Umeda; Kyoya Takano (ICECS, 2021)

Design of an Area-Efficient Differential Distributed Amplifier Based on the Theory of Differential Transmission Lines. - Keisuke Kawahara; Yohtaro Umeda; Kyoya Takano (ISCAS, 2021)

A Broadband Active Balun with Inductor-Less Active Peaking and Imbalance Correction. - Keisuke Kawahara; Yohtaro Umeda; Kyoya Takano (MWSCAS, 2021)

300-GHz-Band OFDM Video Transmission with CMOS TX/RX Modules and 40dBi Cassegrain Antenna toward 6G. - Yohei Morishita; Sangyeop Lee; Toshihiro Teraoka; Ruibing Dong; Yuichi Kashino; Hitoshi Asano; Shinsuke Hara; Kyoya Takano; Kosuke Katayama; Takenori Sakamoto; Naganori Shirakata; Koji Takinami; et al. (IEICE Trans. Electron., 2021)

A 50 Gbps 49 mW CMOS Analog Multiplexer for a DAC Bandwidth Tripler. - Keisuke Kawahara; Joe Sawada; Takumi Kamo; Yohtaro Umeda; Kyoya Takano (RWS, 2022)

A 76-Gbit/s 265-GHz CMOS Receiver With WR-3.4 Waveguide Interface. - Shinsuke Hara; Ruibing Dong; Sangyeop Lee; Kyoya Takano; Naoya Toshida; Akifumi Kasamatsu; Kunio Sakakibara; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (IEEE J. Solid State Circuits, 2022)

A 2D Beam-Steerable 252-285-GHz 25.8-Gbit/s CMOS Receiver Module. - Takeshi Yoshida; Shinsuke Hara; Tatsuo Hagino; Mohamed H. Mubarak; Akifumi Kasamatsu; Kyoya Takano; Yoshiki Sugimoto; Kunio Sakakibara; Shuhei Amakawa; Minoru Fujishima (A-SSCC, 2023)

39 - 67 GHz CMOS Multistage Power Amplifier With Two-Way Power Stage. - Sho Okii; Shinsuke Hara; Akifumi Kasamatsu; Yohtaro Umeda; Kyoya Takano (ICICDT, 2023)

A 0.0058-mm2 Inductor-Less CMOS Active Balun With Gain and Phase Errors Within -0.1 ± 0.2 dB and -0.18 ± 1.17° From DC to 8 GHz. - Keisuke Kawahara; Yohtaro Umeda; Kyoya Takano; Shinsuke Hara (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

A 0.6-V 41.3-GHz Power-Scalable Sub-Sampling PLL in 55-nm CMOS DDC. - Sangyeop Lee; Kyoya Takano; Shuhei Amakawa; Takeshi Yoshida; Minoru Fujishima (IEICE Trans. Electron., 2023)

A Compact Fully-Differential Distributed Amplifier with Coupled Inductors in 0.18-µm CMOS Technology. - Keisuke Kawahara; Yohtaro Umeda; Kyoya Takano; Shinsuke Hara (IEICE Trans. Electron., 2023)

A 300-GHz-Band 36-Gb/s Scalable 2x2 2D Phased-Array CMOS Receiver. - Satoshi Tanaka; Shinsuke Hara; Kyoya Takano; Akifumi Kasamatsu; Yoshiki Sugimoto; Kunio Sakakibara; Shunichi Kubo; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (A-SSCC, 2024)

A 0.00027 mm2 1.2V 0.089pJ/bit 10Gbps 41.6 GHz Standard-Cell-Based Passive-Less Wireless OOK Transmitter with On-Chip Antenna in 12nm FinFET. - Hiroaki Kitaike; Hironori Tagawa; Masaya Kaneko; Jin Nakamura; Shufan Xu; Ruilin Zhang; Kunyang Liu; Hiroki Wakatsuchi; Kyoya Takano; Hirofumi Shinohara; Kiichi Niitsu (NorCAS, 2024)

25.9-Gb/s 259-GHz Phased-Array CMOS Receiver Module with 28° Steering Range. - Shinsuke Hara; Mohamed H. Mubarak; Akifumi Kasamatsu; Yoshiki Sugimoto; Kunio Sakakibara; Kyoya Takano; Takeshi Yoshida; Shuhei Amakawa; Minoru Fujishima (RWS, 2024)