7.2 A 128Gb 3b/cell V-NAND flash memory with 1Gb/s I/O rate. - Jae-Woo Im; Woopyo Jeong; Doo-Hyun Kim; Sangwan Nam; Dong-Kyo Shim; Myung-Hoon Choi; Hyun-Jun Yoon; Dae-Han Kim; Youse Kim; Hyun Wook Park; Dong-Hun Kwak; Sang-Won Park; et al. (ISSCC, 2015)

7.1 256Gb 3b/cell V-NAND flash memory with 48 stacked WL layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (ISSCC, 2016)

A 128 Gb 3b/cell V-NAND Flash Memory With 1 Gb/s I/O Rate. - Woopyo Jeong; Jae-Woo Im; Doo-Hyun Kim; Sangwan Nam; Dong-Kyo Shim; Myung-Hoon Choi; Hyun-Jun Yoon; Dae-Han Kim; Youse Kim; Hyun Wook Park; Dong-Hun Kwak; Sang-Won Park; et al. (IEEE J. Solid State Circuits, 2016)

256 Gb 3 b/Cell V-nand Flash Memory With 48 Stacked WL Layers. - Dongku Kang; Woopyo Jeong; Chulbum Kim; Doo-Hyun Kim; Yong-Sung Cho; Kyung-Tae Kang; Jinho Ryu; Kyung-Min Kang; Sungyeon Lee; Wandong Kim; Hanjun Lee; Jaedoeg Yu; et al. (IEEE J. Solid State Circuits, 2017)

A 0.33-1 GHz Open-Loop Duty Cycle Corrector With Digital Falling Edge Modulator. - Kyung-Tae Kang; Sang-Yun Kim 001; Sung Jin Kim; Dong-Soo Lee; Sang-Sun Yoo; Kang-Yoon Lee (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Hybrid Ideals of BCK/BCI-Algebras. - Kyung-Tae Kang; Seok-Zun Song; Eun Hwan Roh; Young Bae Jun (Axioms, 2020)